19.6.1 Sleep Configuration
| Name: | SLEEPCFG |
| Offset: | 0x01 |
| Reset: | 0x00 |
| Property: | PAC Write-Protection |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SLEEPMODE[2:0] | |||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 | ||||||
Bits 2:0 – SLEEPMODE[2:0] Sleep Mode
Note: A small latency happens between the
store instruction and actual writing of the SLEEPCFG register due to bridges.
Software has to make sure the SLEEPCFG register reads the wanted value before issuing
Wait For Interrupt (WFI) instruction.
| Value | Name |
|---|---|
| 0x0 | IDLE0 |
| 0x1 | Reserved |
| 0x2 | IDLE2 |
| 0x3 | Reserved |
| 0x4 | STANDBY |
| 0x5 - 0x7 | Reserved |