32.8 Register Summary - I2C Host
Refer to the Registers Description section for more details on register properties and access permissions.
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
| 0x00 | CTRLA | 31:24 | LOWTOUTEN | INACTOUT[1:0] | SCLSM | SPEED[1:0] | ||||
| 23:16 | SEXTTOEN | MEXTTOEN | SDAHOLD[1:0] | PINOUT | ||||||
| 15:8 | ||||||||||
| 7:0 | RUNSTDBY | MODE[2:0] | ENABLE | SWRST | ||||||
| 0x04 | CTRLB | 31:24 | ||||||||
| 23:16 | ACKACT | CMD[1:0] | ||||||||
| 15:8 | QCEN | SMEN | ||||||||
| 7:0 | ||||||||||
0x08 ... 0x0B | Reserved | |||||||||
| 0x0C | BAUD | 31:24 | HSBAUDLOW[7:0] | |||||||
| 23:16 | HSBAUD[7:0] | |||||||||
| 15:8 | BAUDLOW[7:0] | |||||||||
| 7:0 | BAUD[7:0] | |||||||||
0x10 ... 0x13 | Reserved | |||||||||
| 0x14 | INTENCLR | 7:0 | ERROR | SB | MB | |||||
0x15 | Reserved | |||||||||
| 0x16 | INTENSET | 7:0 | ERROR | SB | MB | |||||
0x17 | Reserved | |||||||||
| 0x18 | INTFLAG | 7:0 | ERROR | SB | MB | |||||
0x19 | Reserved | |||||||||
| 0x1A | STATUS | 15:8 | LENERR | SEXTTOUT | MEXTTOUT | |||||
| 7:0 | CLKHOLD | LOWTOUT | BUSSTATE[1:0] | RXNACK | ARBLOST | BUSERR | ||||
| 0x1C | SYNCBUSY | 31:24 | ||||||||
| 23:16 | ||||||||||
| 15:8 | ||||||||||
| 7:0 | SYSOP | ENABLE | SWRST | |||||||
0x20 ... 0x23 | Reserved | |||||||||
| 0x24 | ADDR | 31:24 | ||||||||
| 23:16 | LEN[7:0] | |||||||||
| 15:8 | TENBITEN | HS | LENEN | ADDR[10:8] | ||||||
| 7:0 | ADDR[7:0] | |||||||||
| 0x28 | DATA | 15:8 | ||||||||
| 7:0 | DATA[7:0] | |||||||||
0x2A ... 0x2F | Reserved | |||||||||
| 0x30 | DBGCTRL | 7:0 | DBGSTOP | |||||||