24.11.5 UBRRL – USART Baud Rate Register Low
When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
| Name: | UBRRL |
| Offset: | 0x09 |
| Reset: | 0x00 |
| Property: | When addressing I/O Registers as data space the offset address is 0x29 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| UBBR[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 7:0 – UBBR[7:0] USART Baud Rate Register
This is a 12-bit register which contains the USART baud rate. The UBRRH contains the four most significant bits, and the UBRRL contains the eight least significant bits of the USART baud rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if the baud rate is changed. Writing UBRRL will trigger an immediate update of the baud rate prescaler.