31.1.2 Definitions

The Flash Controller, Write (FCW) supports programming operations (writes/erases) for on-chip flash memory. This device’s memories has the following addressing:

Table 31-1. Memory Addressing
Addressing ParameterValueUnits
General
Bytes per Row1024Bytes
Word Size - bits (Data, Reg, Fuse)32bits
Word Size - Bytes (Data, Reg, Fuse)4Bytes
Address Increment32bits
Standard
Single Write + simple parity32bits
Double Write + simple parity64bits
Flash
Single Quad Read Word (QRW)128bits
QRW w/ECC (12-bits)140bits
Single Quad Write Word (QWW)128bits
QWW w/ECC (3-bits)131bits
Quad Double Read Word (QDRW)256bits
QDRW w/ECC (16-bits)272bits
Quad Double Write Word (QDWW)256bits
QDWW w/ECC (4-bits)260bits
Figure 31-1. Flash Module Construction

Flash regions of concern include:

  • Program Flash Memory (PFM)
  • Boot Flash Memory (BFM)
  • Configuration Flash Memory (CFM)

A Flash panel is divided into two partitions: Main and NVR. Main contains the PFM while NVR both the BFM and CFM.

Be aware that a panel is not a physical construct, but a conceptual model. (The System Address Map shows the actual memory layout.)