31.1.3 Flash Architecture
Each Flash partition is built up of several pages, also called sectors. The controller works with a panel made from 4KB pages with each page containing 4 rows of Flash data. A row is the largest selectable region for contiguous programming of Write Words. A Row contains 4 Write Words.
A page of Flash is the smallest unit of memory that can be erased in a single operation. A panel’s Program Flash Memory (PFM) space can also be erased in a single operation. All other erases use multiple operations.
A Write Word is the only unit of memory that can be programmed at a time. All other programming operations are made up of several contiguous Write Word Program operations. The FCW supports:
- Row Write: Write Word by Write Word programming until the whole Row is written. Data is read by the FCW from System SRAM.
- Quad Write: The FCW performs 4 writes of data from holding registers
- Single Write: The FCW performs one write of data from holding register(s)
See the table in the Definitions section.
Program Flash Memory (PFM)
PFM is the largest section of Flash memory. It can span across two panels. When two Panels are used, the location for Panel 1 is in the lower address range and Panel 2 in the upper address range. The order in which each PFM exist in the Flash memory space can be controlled by software. The PFM address range is contiguous across both panels.
Dual panel systems support Live Update which allows reading from one panel while write to the other. It does not matter which of the logical regions are being accessed as long as they are in different panels.
Boot Flash Memory (BFM)
Boot Flash Memory is meant to support sophisticated boot loaders. It has 4 pages that are either divided between dual panels, or all pages are in a single BFM panel.
PIC32C devices have a Boot ROM to control configuration loading and to provide a root of trust for secure boot. When the Boot ROM has finished loading the configuration it sets up the CPU to start execution from the base address of the BFM.
The BFM can be used in either Dual Boot or Single Boot. With a dual panel system, each panel has BFM code. Dual Boot designates each panel’s BFM as a boot source. This allows for the safe updating of one boot image while the other image stays intact. A Single Boot, with two panels, allows the boot image to span both panel’s BFM space providing for a larger boot code space. The BFM only has the memory in the existing panel when a single panel exists.
Configuration Flash Memory (CFM)
CFM contains several pages. Like BFM it is either divided between dual panels, or all pages are in a single CFM panel. This memory is dedicated to the configuration of the device (See the following table). These pages have hardware-imposed restrictions on their usage. They are not for code and may not be accessible after the device is protected.
One page contains factory calibration data including the unique ID of the device . This page cannot be written or erased.
The Boot Configuration (Boot CFG) page contains pre-boot options to be configured by the Boot ROM. This page can be read protected and write/erase protected by the Flash system.
The User-OTP page implements a Flash-based “One Time Programmable” region. It is always erase protected by hardware such that its content survives a Chip Erase operation. It is intended to store calibration values for external devices but is fully user defined. That is it can be written only once, but accessed thereafter.
The User Configuration (User CFG) page stores pre-boot options that have a different protection model than Boot CFG. This page can be write/erase locked.
For systems that have dual panels, the second panel’s CFM contains additional pages to support dual boot. Boot CFG 2 and User CFG 2 allows for safe updates of configuration data while also updating application code in PFM, or boot code in BFM. This is different than a bootloader.
| Panel: | Address: | Size: | Contents: | Notes: | |
|---|---|---|---|---|---|
| Start: | End: | ||||
| 1 | 0x0A00_0000 | 0x0A00_0FFF | 4 KByte | User CFG-1 | - |
| 1 | 0x0A00_1000 | 0x0A00_1FFF | 4 KByte | User OTP-1 | - |
| 1 | 0x0A00_2000 | 0x0A00_2FFF | 4 KByte | BOOT CFG-1 | - |
| 1 | 0x0A00_3000 | 0x0A00_3FFF | 4 KByte | ROM CFG-1 | - |
| 1 | 0x0A00_4000 | 0x0A00_4FFF | 4 KByte | VSS0 | - |
| 1 | 0x0A00_5000 | 0x0A00_5FFF | 4 KByte | VSS1 | - |
| 1 | 0x0A00_6000 | 0x0A00_6FFF | 4 KByte | RSVD | - |
| 1 | 0x0A00_7000 | 0x0A00_7FFF | 4 KByte | CAL-OTP | Cannot be written or erased. |
| 2 | 0x0A00_8000 | 0x0A00_8FFF | 4 KByte | User CFG-2 | - |
| 2 | 0x0A00_9000 | 0x0A00_9FFF | 4 KByte | User OTP-2 | - |
| 2 | 0x0A00_A000 | 0x0A00_AFFF | 4 KByte | BOOT CFG-2 | - |
| 2 | 0x0A00_B000 | 0x0A00_BFFF | 4 KByte | RSVD | No access. |
| 2 | 0x0A00_C000 | 0x0A00_CFFF | 4 KByte | RSVD | No access. |
| 2 | 0x0A00_D000 | 0x0A00_DFFF | 4 KByte | RSVD | No access. |
| 2 | 0x0A00_E000 | 0x0A00_EFFF | 4 KByte | RSVD | No access. |
| 2 | 0x0A00_F000 | 0x0A00_FFFF | 4 KByte | RSVD | No access. |
|
Note: All RSVD addresses are “Address Holes” and therefore generate
a bus error back to the initiator.
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