39.7.4 Event Control

Table 39-6. Register Bit Attribute Legend
Symbol	Description	Symbol	Description	Symbol	Description
R	Readable bit	HC	Cleared by Hardware	(Grey cell)	Unimplemented
W	Writable bit	HS	Set by Hardware	X	Bit is unknown at Reset
K	Write to clear	S	Software settable bit	—	—

Name:	EVCTRL
Offset:	0x0C
Reset:	0x00000000
Property:	RW


Bit	31	30	29	28	27	26	25	24
	INVEI[7:0]
Access	RW	RW	RW	RW	RW	RW	RW	RW
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	COMPEI[7:0]
Access	RW	RW	RW	RW	RW	RW	RW	RW
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
					WINEO[3:0]
Access					RW	RW	RW	RW
Reset					0	0	0	0


Bit	7	6	5	4	3	2	1	0
	COMPEO[7:0]
Access	RW	RW	RW	RW	RW	RW	RW	RW
Reset	0	0	0	0	0	0	0	0

Bits 31:24 – INVEI[7:0] Inverted Event Input Enable x

Bits 23:16 – COMPEI[7:0] Comparator x Event Input Enable

Bits 11:8 – WINEO[3:0] Window x Event Output Enable

Bits 7:0 – COMPEO[7:0] Comparator x Event Output Enable

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