1 System Overview

The system must contain the following parameters to perform the In-System Programming (ISP) for the FPGA.

  • A microprocessor with at least 8192 bytes of RAM or a softcore processor implemented in another FPGA.
  • SPI IP to interface with the target device. SPI Mode 3 must be used.
  • Access to the data file containing the programming data.
  • Memory to store and run SPI-DirectC code.

For more information on power requirements for Vpump and other power supplies, see your device product device datasheet.

The following table lists the memory requirements.

Table 1-1. Code Memory Requirements- SPI-DirectC Code Size on CM3 16-Bit Mode
Compile Options EnabledUnits are in Bytes
ROM Code1ROM Data2Read/Write Data3
ENABLE_G4_SUPPORT1690260812578
ENABLE_G5_SUPPORT20242157012851
All the above30414157613639
Note:
  1. ROM Code— This is the compiled code size memory requirements.
  2. ROM Data— This is the block started by Symbol allocation for variables that do not yet have values, that is, uninitialized data. It is part of the overall data size.
  3. Read/Write Data— This is the run time memory requirement, that is, the free data memory space required to execute the code.