This register is used to
program the minimum and maximum values for the arqos and awqos signals generated by the
latency regulators.
Name:
NICGPV_ASIB_QOS_RANGEx
Offset:
0x042138 + x*0x1000 [x=0..10]
Reset:
0x00000000
Property:
Read/Write
Bit
31
30
29
28
27
26
25
24
AR_MAX_QOS[3:0]
Access
R/W
R/W
R/W
R/W
Reset
0
0
0
0
Bit
23
22
21
20
19
18
17
16
AR_MIN_QOS[3:0]
Access
R/W
R/W
R/W
R/W
Reset
0
0
0
0
Bit
15
14
13
12
11
10
9
8
AW_MAX_QOS[3:0]
Access
R/W
R/W
R/W
R/W
Reset
0
0
0
0
Bit
7
6
5
4
3
2
1
0
AW_MIN_QOS[3:0]
Access
R/W
R/W
R/W
R/W
Reset
0
0
0
0
Bits 27:24 – AR_MAX_QOS[3:0] AR Maximum QOS
Maximum
arqos
Bits 19:16 – AR_MIN_QOS[3:0] AR Minimum QOS
Minimum
arqos
Bits 11:8 – AW_MAX_QOS[3:0] AW Maximum QOS
Maximum
awqos
Bits 3:0 – AW_MIN_QOS[3:0] AW Minimum QOS
Minimum
awqos
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
