This register is used to
program a binary fraction of the peak number of transfers per cycle.
Name:
NICGPV_ASIB_AW_Px
Offset:
0x042118 + x*0x1000 [x=0..10]
Reset:
0x00000000
Property:
Read/Write
Bit
31
30
29
28
27
26
25
24
AW_P[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
Access
Reset
Bit
15
14
13
12
11
10
9
8
Access
Reset
Bit
7
6
5
4
3
2
1
0
Access
Reset
Bits 31:24 – AW_P[7:0] AW Channel Peak Rate
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
