25.8.5 Interrupt Enable Set in COUNT32 mode (CTRLA.MODE=0)
| Name: | INTENSET |
| Offset: | 0x0A |
| Reset: | 0x0000 |
| Property: | - |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| OVF | TAMPER | CMPn[3:0] | |||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PER7 | PER6 | PER5 | PER4 | PER3 | PER2 | PER1 | PER0 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 15 – OVF Overflow Interrupt Enable
0’ to this bit has no effect.Writing a ‘1’
to this bit clears the Overflow Interrupt Enable bit, which disables the
Overflow interrupt.
| Value | Description |
|---|---|
| 0 | The Overflow interrupt is disabled. |
| 1 | The Overflow interrupt is enabled. |
Bit 14 – TAMPER Tamper Interrupt Enable
0’
to this bit has no effect.Writing a ‘1’ to this bit clears the
Tamper Interrupt Enable bit, which disables the Tamper
interrupt.
| Value | Description |
|---|---|
| 0 | The Tamper interrupt is disabled. |
| 1 | The Tamper interrupt is enabled. |
Bits 11:8 – CMPn[3:0] Compare n Interrupt Enable [n = 3..0]
0’
to this bit has no effect.Writing a ‘1’ to this bit clears the
Compare n Interrupt Enable bit, which disables the Compare n
interrupt.
| Value | Description |
|---|---|
| 0 | The Compare n interrupt is disabled. |
| 1 | The Compare n interrupt is enabled. |
Bits 10:8 – CMPn[2:0] Compare n Interrupt Enable [n = 2..0]
0’
to this bit has no effect.Writing a ‘1’ to this bit clears the
Compare n Interrupt Enable bit, which disables the Compare n
interrupt.
| Value | Description |
|---|---|
| 0 | The Compare n interrupt is disabled. |
| 1 | The Compare n interrupt is enabled. |
Bits 8, 9 – CMPn Compare n Interrupt Enable [n = 1..0]
0’
to this bit has no effect.Writing a ‘1’ to this bit clears the
Compare n Interrupt Enable bit, which disables the Compare n
interrupt.
| Value | Description |
|---|---|
| 0 | The Compare n interrupt is disabled. |
| 1 | The Compare n interrupt is enabled. |
Bit 8 – CMPn Compare 0 Interrupt Enable
0’
to this bit has no effect.Writing a ‘1’ to this bit clears the
Compare 0 Interrupt Enable bit, which disables the Compare 0
interrupt.
| Value | Description |
|---|---|
| 0 | The Compare 0 interrupt is disabled. |
| 1 | The Compare 0 interrupt is enabled. |
Bits 0, 1, 2, 3, 4, 5, 6, 7 – PERn Periodic Interval n Interrupt Enable [n = 7..0]
0’ to this bit has no effect.Writing a ‘1’
to this bit clears the Periodic Interval n Interrupt Enable bit, which disables
the Periodic Interval n interrupt.
| Value | Description |
|---|---|
| 0 | Periodic Interval n interrupt is disabled. |
| 1 | Periodic Interval n interrupt is enabled. |