36.7.1 Interrupt Sources

The ADC is capable of generating interrupts from the events listed in the following table.

Table 36-4. ADC Interrupt Sources
Interrupt EventDescriptionInterrupt Enable BitInterrupt Status Bit
ANx Data Ready Event (ADC_GIRQ)Interrupt is generated upon a completion of a conversion from an analog input source (ANx). Each of the ARDYx bits is capable of generating a unique interrupt when set using the ADCBASE register.AGIENx of ADCGIRQEN1ARDYx of ADCDSTAT1 register
Digital Comparator Event (ADC_DIRQ)When a conversion's comparison criteria are met by a configured and enabled digital comparator. Each of the digital comparators is capable of generating a unique interrupt when its DCMPED bit is set.DCMPGIEN of ADCCMPCONx register DCMPED of ADCCMPCONx register
Oversampling Filter Data Ready Event (ADC_AIRQ)When an oversampling filter completed the accumulation/decimation process and stored the resultAFGIEN of ADCFLTRx registerAFRDY of ADCFLTRx register
Both Band Gap Voltage and ADC Reference Voltage Ready Event (ADC_BGVR_RDY)Interrupt is generated when both band gap voltage and ADC reference voltage are readyBGVRIEN of ADCCON2 registerBGVRRDY of ADCCON2 register
Band Gap Fault/Reference Voltage Fault/AVDD Brown-out Fault Event (ADC_FLT)Interrupt is generated when Band Gap Fault/Reference Voltage Fault/AVDD Brown-out occursREFFLTIEN of ADCCON2 registerREFFLT of ADCCON2 register
End of Scan Event (ADC_FCC)Interrupt is generated when all the selected inputs completed scanEOSIEN of ADCCON2 registerEOSRDY of ADCCON2 register
ADC Module Wake-up EventInterrupt is generated when ADC wakes up after being enabledWKIEN7 of ADCANCON registerWKRDY7

of ADCANCON

register

Update Ready EventInterrupt is generated when ADC SFRs are ready to be (and can be safely) updated with new valuesUPDIEN of ADCCON3 registerUPDRDY of ADCCON3 register