39.7.2.1 Data Bus Width
A data bus width of 8 or 16 bits can be selected for each chip select. This option is con-trolled by the field DBW in SMC_MODE (Mode Register) for the corresponding chip select.
A data bus width of 8 or 16 bits can be selected for each chip select. This option is con-trolled by the field DBW in SMC_MODE (Mode Register) for the corresponding chip select.
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