31.2.16.1 Page Erase Sequence
A page erase performs an erase of a single page of PFM or BFM or select pages in CFM (User, Boot). The page to be erased is selected using ADDR. The lower bits of the address given by ADDR are ignored in page selection.
Note: It is the responsibility of the user
code to ensure that no bus initiators, including the CPU, access the Flash region, the
entire PFM of the panel, or the entire Boot of the panel, that is to be or being
erased.
Page Erase
A Page Erase sequence comprises the following steps:
- <Desired NVMOP> is Page Erase.
- Follow the Start Sequencer from Start Sequencer.
- Wait for NVM Interrupt from Interrupts.
- Check the INTFLAG bits to ensure that the program sequence completed successfully, and then clear all bits in INTFLAG. See Errors and Flags about error flags.
- Unlock the hardware write mutex by setting the LOCK bit to ‘0’ and the OWNER field to ‘00’ simultaneously to the MUTEX register.
A page of Flash can be erased if its associated page write protection is not enabled, see Debug Access Level.
Page Erase Timing
Page Erase timing is dominated by setup (Tnvs), erase time (Terase) and recovery (Trcv) delays. Using the timing shown in FLASH TIMING PARAMETERS, total time to erase one page is:
Page Erase = Tnvs + Terase + Trcv + Trw