39.7.4.4 Read Cycle

The NRD CYCLE time is defined as the total duration of the read cycle, i.e., from the time where address is set on the address bus to the point where address may change. The total read cycle time is defined as:

NRD CYCLE = NRD SETUP + NRD PULSE + NRD HOLD,

as well as

NRD CYCLE = NCS RD SETUP + NCS RD PULSE + NCS RD HOLD

All NRD and NCS timings are defined separately for each chip select as an integer number of Host Clock cycles. The NRD CYCLE field is common to both the NRD and NCS signals, thus the timing period is of the same duration.

NRD CYCLE, NRD SETUP, and NRD PULSE implicitly define the NRD HOLD value as:

NRD HOLD = NRD CYCLE - NRD SETUP - NRD PULSE

NRD CYCLE, NCS RD SETUP, and NCS RD PULSE implicitly define the NCS RD HOLD value as:

NCS RD HOLD = NRD CYCLE - NCS RD SETUP - NCS RD PULSE