2.3.2 EN, nSTRTO, PWRHLD Functionality

After a Power-On Reset (POR), when the EN pin is detected HIGH, the MCP16503 initiates the power-up sequence and transitions to Start-up mode.

Once the first power-up sequence is successfully completed, an internal status bit PSEQ_DONE is set. This bit indicates that the PMIC has completed its start-up sequence.

After PSEQ_DONE is set, the EN pin HIGH alone will no longer trigger a transition to Start-up mode. From this point onward, startup and shutdown operations can be controlled using the PWRHLD pin.

The PSEQ_DONE bit is cleared only under the following conditions:

• The device is power cycled.
• The EN pin goes LOW and the defined timeout expires (please refer to Power-Up/Power-Down/HIBERNATE Sequences and Timings).
• The EN pin is LOW while the IC is in OFF mode.

The PSEQ_DONE bit is set when all regulators enabled during the start-up sequence have successfully ramped up, which occurs at the end of time t₄, as shown in EN Power Start-up Scenario: EN Short to VIN.

nSTRTO signal is asserted LOW whenever the EN is detected to be HIGH and t₁ is not expired. In case t₁ is configured to be 0, nSTRTO is asserted LOW for 10  μs as long as EN pin is detected HIGH. The pin is high-Z otherwise (typically nSTRTO has an external pull-up resistor). The only exception to this input (EN) /output (nSTRTO) relationship is the so-called Automatic Wake-Up Pulse (AWKP). Please refer to section Restart Aequence After Fault During HIBERNATE: Automatic Wake-up Pulse (AWKP) Generation for the detailed timing diagram.

After the start-up sequence has been initiated, MCP16503 expects the assertion of the PWRHLD signal (Power-Hold) from the MPU to validate the sequence.

PWRHLD could be already HIGH in a typical application using a backup supply. If PWRHLD has NOT been asserted HIGH by the MPU before the completion of the start-up sequence (i.e. when nRSTO is about to be asserted high), the MCP16503 will automatically initiate a turn-off sequence.