2.4.7 Restart Sequence After Fault and Automatic Wake-Up Pulse (AWKP) Generation
The power-up sequence is also automatically executed when reacting to severe fault conditions. Please see section Protections for information on which faults are triggering a new restart sequence. In the default configuration (i.e. HCPEN bit is 0 for the Buck channels), as soon as a fault is detected, the power delivery on all channels is terminated and the MCP16503 waits for 100 ms. After this wait time, a new start-up sequence is generated in the attempt to restart the system correctly.
A special feature is provided to enable system recovery if the restart sequence after fault occurs while in HIBERNATE mode. In HIBERNATE mode, the PWRHLD was previously asserted low by the MPU, and the MPU expects a wake-up event in order to set PWRHLD to high again. This must be a hardware event, which is flagged to some I/O inside the MPU Shutdown and Wake-Up Controller block (SHDWC), for example a logic transition on a WKUPx or PIOBUx pin.
On the other hand, if a fault (e.g. a short-circuit on a Buck channel having HCPEN = 0 and left ON during HIBERNATE) causes a restart sequence while in HIBERNATE, the restart sequence won’t be successfully completed if no wake-up event is generated for the MPU SHDWC, because PWRHLD will stay low. It is necessary for the PWRHLD signal to be high just prior to the completion of the start-up sequence to have nRSTO asserted high.
This is solved by generating from the MCP16503 an automatic wake-up pulse (AWKP) on the nSTRTO output if the fault that generates a restart sequence has occurred while in HIBERNATE mode.
The automatic wake-up pulse generation can be optionally disabled by the user by setting bit AWKPDIS (bit4) in register SYS-CFG (0x03). The AWKP function is enabled by default.
The timing diagram of a restart sequence caused by a fault while in HIBERNATE mode is shown below in Figure 2-11.
Just before initiating the restart sequence, the MCP16503 generates a 25 ms (nominal duration) Automatic Wake-Up Pulse on the nSTRTO output, even in lack of a low-level on the EN input. This is the only situation where the nSTRTO logic level does not reflect the EN input status. The duration of the AWK Pulse erodes into the 100 ms wait time that precedes the automatic restart sequence.
PWRHLD will typically return high as soon as the nSTRTO signal is detected to be low by the MPU SHDWC. If LPM stays high for any reason, the MCP16503 will go in Low-Power mode immediately after the automatic start-up sequence. This behavior is shown in Figure 4-15 in the Typical Performance Curves section.
If the restart sequence after a fault is executed in any other operational state but HIBERNATE, PWRHLD would either be already high (in applications with backup power) or it would return high as soon as the VDDIO rail is started, thus making the generation of the Automatic Wake-Up pulse not necessary.
Where:
- trestart = duration of the automatic start-up (restart) sequence
- t5 = minimum setup/hold time: min. 0 μs (internal filtering applies)