10.1.3.3 set_io
(Ask a Question)- GPIO
- HSIO
I/O Types | Supported I/O Standards |
---|---|
HSIO | LVCMOS12, LVCMOS15, LVCMOS18, SSTL18I, SSTL18II, HSUL18I, HSUL18II, SSTL15I, SSTL15II, HSTL15I, HSTL15II, SSTL135I, SSTL135II, HSTL135I, HSTL135II, HSTL12I, HSTL12II, HSUL12I, SLVSE15, POD12I, POD12II, SLVS18, HCSL18, LVDS18, RSDS18, MINILVDS18, SUBLVDS18, PPDS18, LCMDS18, SHIELD18, SHIELD15, SHIELD135, SHIELD12 |
GPIO | LVTTL, LVCMOS33, PCI, LVCMOS12, LVCMOS15, LVCMOS18, LVCMOS25, SSTL25I, SSTL25II, SSTL18I, SSTL18II, HSUL18I, HSUL18II, SSTL15I, SSTL15II, HSTL15I, HSTL15II, SLVS33, HCSL33, HCSL25, MIPI25, MIPIE25, LVPECL33, LVPECL25, LVPECLE33, LVDS18G, LVDS25, LVDS33, RSDS25, RSDS33, MINILVDS25, MINILVDS33, SUBLVDS25, SUBLVDS33, PPDS25, PPDS33, SLVSE15, MLVDSE25, BUSLVDSE25, LCMDS33, LCMDS25, SHIELD33, SHIELD25, SHIELD18, SHIELD15, SHIELD12 |
The following is the syntax for this command:
set_io -port_name <port_name> \
[-pin_name <package_pin>] \
[-fixed <true|false>] \
[-io_std <io_std_values>] \
[-OUT_LOAD <value>] \
[-RES_PULL <value>] \
[-LOCK_DOWN <value>] \
[-CLAMP_DIODE <value>] \
[-SCHMITT_TRIGGER <value>] \
[-SLEW <value>] \
[-VCM_RANGE <value>] \
[-ODT <value>] \
[-ODT_VALUE] \
[-OUT_DRIVE <value>] \
[-IMPEDANCE <value>] \
[-SOURCE_TERM <value>] \
[-IN_DELAY <value>] \
[-OUT_DELAY <value>]
Arguments
- -port_name <port_name>
- Specifies the port name of the I/O macro.
- -pin_name <package_pin>
- Specifies the package pin name(s) on which to place the I/O.
- -io_std <value>
Sets the I/O standard for this macro. If the voltage standard used with the I/O is not compatible with other I/Os in the I/O bank, assigning an I/O standard to a port invalidates its location and automatically unassigns the I/O.
The following table lists the supported values for
-io_std
and their corresponding I/O standards. Some I/O standards support only single I/O or differential I/Os, while others support both single and differential I/Os.Table 10-11. -io_std Values and Corresponding I/O Standards -io_std Value I/O Standard Single Differential LVTTL YES NO LVCMOS33 YES NO LVCMOS25 YES NO LVCMOS18 YES NO LVCMOS15 YES NO LVCMOS12 YES NO PCI YES NO POD12I YES YES POD12II YES YES PPDS33 NO YES PPDS25 NO YES PPDS18 NO YES SLVS33 NO YES SLVS25 NO YES SLVS18 NO YES HCSL33 NO YES HCSL25 NO YES HCSL18 NO YES SLVSE15 NO YES BUSLVDSE NO YES BUSLVDSE25 NO YES MLVDSE NO YES MLVDSE25 NO YES LVDS NO YES LVDS25 NO YES LVDS18 NO YES LVDS18G NO YES BUSLVDS NO YES BUSLVDSE25 NO YES MLVDS NO YES MIPI25 NO YES MIPIE25 NO YES MIPIE33 NO YES MINILVDS NO YES MINILVDS33 NO YES MINILVDS25 NO YES MINILVDS18 NO YES RSDS NO YES RSDS33 NO YES RSDS25 NO YES RSDS18 NO YES LVPECL (only for inputs) NO YES LVPECL33 NO YES LVPECLE33 NO YES HSTL15I YES YES HSTL15II YES YES HSTL135I YES YES HSTL135II YES YES HSTLI2I YES YES HSTL12II YES YES SSTL18I YES YES SSTL18II YES NO SSTL15I YES YES SSTL15II YES NO SSTL135I YES YES SSTL135II YES YES SSTL25I YES YES SSTL25II YES YES HSUL18I YES YES HSUL18II YES YES HSUL12I YES YES HSUL12II YES YES SUBLVDS33 NO YES SUBLVDS25 NO YES SUBLVDS18 NO YES LCMDS33 NO YES LCMDS25 NO YES LCMDS18 NO YES SHIELD33 YES NO SHIELD25 YES NO SHIELD18 YES NO SHIELD15 YES NO SHIELD135 YES NO SHIELD12 YES NO - -fixed <value>
Specifies whether the location of this port is fixed (that is, locked). Locked ports are not moved during layout. The default value is true. You can enter one of the following values.
Table 10-12. -fixed Values Value Description True The location of this port is locked. False The location of this port is unlocked. - -OUT_LOAD <value>
Sets the output load (in pF) of output signals. The default is 5 pF.
Direction: Output
- -RES_PULL <value>
Allows you to include a weak resistor for either pull-up or pull-down of the input and output buffers. Not all I/O standards have a selectable resistor pull option.
The following table lists the acceptable values for the
-RES_PULL
attribute for the input buffer.Table 10-13. -RES_PULL Values (Input Buffer) I/O Standards Value Description Single I/Os: LVTTL, LVCMOS33, LVCMOS25, LVCMOS18, LVCMOS15, LVCMOS12, PCI Up Includes a weak resistor for pull-up of the input buffer. Down Includes a weak resistor for pull-down of the input buffer. Hold Holds the last value. None Does not include a weak resistor. Differential I/Os: PPDS25, PPDS33, HCSL33, HCSL25, BUSLVDSE25, LVDS33, LVDS25, LVDS18G, MINILVDS33, MINILVDS25, RSDS33, RSDS25, LVPECL33, SUBLVDS33, SUBLVDS25, LCMDS33, LCMDS25 Up Includes a weak resistor for pull-up of the input buffer. Down Includes a weak resistor for pull-down of the input buffer. For I/O standards in the preceding table, the default is Up. For all other I/O standards, the value is None.
The following table lists the acceptable values for the
-RES_PULL
attribute for the output buffer.Table 10-14. -RES_PULL Values (Output Buffer) I/O Standards Value Description Single I/Os: LVTTL, LVCMOS33, LVCMOS25, LVCMOS18, LVCMOS15, LVCMOS12, PCI Up Includes a weak resistor for pull-up of the output buffer. Down Includes a weak resistor for pull-down of the output buffer. None Does not include a weak resistor. Note:- For all I/O standards, the default value for output buffer is None.
- For output differential I/Os,
res_pull
is not supported.
Direction: Inout
- -LOCK_DOWN <value>
Security feature that locks down the I/Os, if tampering is detected. Values are ON and OFF. The default is OFF.
Direction: Inout
- -CLAMP_DIODE <value>
Specifies whether to add a power clamp diode to the I/O buffer. This attribute option is available to all I/O buffers with I/O technology set to LVTTL. A clamp diode provides circuit protection from voltage spikes, surges, electrostatic discharge, and other overvoltage conditions.
Values are OFF and ON.
The following table lists the values for GPIO standards. For HSIO standards, the value is always ON.
Table 10-15. -CLAMP_DIODE Values I/O Standards Values LVCMOS12, LVCMOS15, LVCMOS18, SSTL18I, SSTL18II, SSTL15I, SSTL15II, HSTL15I, HSTL15II, LVTTL, LVCMOS33, LVCMOS25, SSTL25I, SSTL25II, SLVS25, HCSL25, LVDS25, RSDS25, MINILVDS25, SUBLVDS25, PPDS25, LCMDS25 OFF, ON. The default is ON. MIPI25, LVDS18G OFF, ON. The default is OFF. HSUL18I, HSUL18II, SLVSE15, PCI, SLVS25, SLVS33, HCSL33, HCSL25, MIPIE33, MIPIE25, LVPECL33, LVPECL25, LVPECLE33, LVDS25, LVDS33, RSDS25, RSDS33, MINILVDS25, MINILVDS33, SUBLVDS25, SUBLVDS33, PPDS25, PPDS33, MLVDSE25, BUSLVDSE25, LCMDS25, LCMDS33 ON Direction: Inout
Note: For input LVDS18G, the only supported value for Clamp Diode is OFF.- -SCHMITT_TRIGGER <value>
Specifies whether this I/O has an input Schmitt Trigger. The Schmitt Trigger introduces hysteresis on the I/O input. This allows very slow moving or noisy input signals to be used with the part without false or multiple I/O transitions taking place in the I/O.
For the following I/O standards, the values are OFF and ON. The default is OFF.
Table 10-16. -SCHMITT_TRIGGER Values I/O Standards Values GPIO LVCMOS25, LVCMOS33, LVTTL, PCI OFF, ON HSIO LVCMOS18, LVCMOS15 OFF, ON For all other I/O standards, the value is OFF.
Direction: Input
- -SLEW <value>
Sets the output slew rate. Slew control affects only the falling edges for some families. Slew control affects both rising and falling edges. Not all I/O standards have a selectable slew. Whether you can use the slew attribute depends on which I/O standard you have specified for this command.
The following I/O standards have values OFF and ON. The default is OFF.
Table 10-17. -SLEW Values I/O Standards Values LVCMOS25, LVCMOS33, LVTTL, PCI OFF, ON For all other I/O standards, the value is OFF.
Direction: Output
- -VCM_RANGE <value>
Sets the VCM input range.
The following table lists the supported values and I/O standards.
Table 10-18. -VCM_RANGE Values I/O Standards Values GPIO HSTL15I, HSTL15II, HSUL18I, HSUL18II, SSTL15I, SSTL15II, SSTL18I, SSTL18II, SSTL25I, SSTL25II MID HCSL33, HCSL25, LVDS18G, LVDS33, LVDS25, LVPECL33, LVPECLE33, MINILVDS33, MINILVDS25, MIPI25, MIPIE25, MLVDSE25, PPDS33, PPDS25, RSDS33, RSDS25, SLVS33, SLVS25, SLVSE15, BUSLVDSE25, SUBLVDS33, SUBLVDS25 Note:While assigning VCM input range for true differential I/Os in the same bank, a mix of MID and LOW values cannot be assigned for the I/Os. You can assign only MID or only LOW values for all differential I/Os in the same bank.
If a mixture of VCM input ranges is needed for true differential inputs within the same GPIO bank, to optimize or tune the interface performance in hardware, the I/O attribute can be set using the Post Layout I/O Editing flow in the Libero Design Flow User Guide, and the
edit_io
command. For more information, see edit_io. In that scenario, the internal 100 Ohm on-die differential termination resistor accuracy percentage tolerance will follow the maximum percentage tolerance of the two ranges per the device datasheet specifications.MID, LOW. The default is MID. LCMDS33, LCMDS25 LOW HSIO HSTL12I, HSTL12II, HSTL135I, HSTL135II, HSTL15I, HSTL15II, HSUL12I, HSUL18I, HSUL18II, LVSTL11I, LVSTL11II, POD12I, POD12II, SSTL135I, SSTL135II, SSTL15I, SSTL15II, SSTL18I, SSTL18II MID SLVSE15, LVDS18, HCSL18, MINILVDS18, PPDS18, RSDS18, SLVS18, SUBLVDS18 MID, LOW. The default is MID. LCMDS18 LOW Direction: Input
- -ODT <value>
On-die Termination (ODT) is the technology where the termination resistor for impedance matching in transmission lines is located inside a semiconductor chip instead of on a printed circuit board.
In case of LVDS fail-safe mode, use the DYNAMIC value for ODT.
Values are OFF and ON.
The following table lists acceptable values.
Table 10-19. -ODT Values I/O Standards Values LVCMOS12, LVCMOS15, LVCMOS18, LVCMOS25 OFF, ON. The default is OFF. HSUL18I, HSUL18II OFF, ON, DYNAMIC. The default is OFF.
SSTL15I, SSTL15II, SSTL18I, SSTL18II, HSUL12I, LVSTL11I, LVSTL11II, POD12I, POD12II, SSTL135I, SSTL135II, HSTL15I, HSTL15II, LVDS18G, LVDS33, LVDS25, LVPECL33, LVPECLE33, LVPECL25, MINILVDS33, MINILVDS25, RSDS33, RSDS25, SUBLVDS33, SUBLVDS25, HSTL12I, HSTL12II, HSTL135I, HSTL135II, LCMDS33, LCMDS25 OFF, ON, DYNAMIC. The default is ON. Direction: Input
- -ODT_VALUE
Sets the ODT value in Ohms.
Values vary depending on the I/O standard. The following table lists acceptable values.
Table 10-20. -ODT_VALUE Values I/O Standards Values LVCMOS12, LVCMOS15, LVCMOS18 120, 240. The default is 120. LVCMOS25 120 HSUL12I 60, 120, 240. The default is 120. SSTL15I, SSTL15II 20, 30, 40, 60, 120. The default is 30. SSTL135I, SSTL135II 20, 30, 40, 60, 120. The default is 40. SSTL18I, SSTL18II 50, 75, 150. The default is 50. POD12I, POD12II 34, 40, 48, 60, 80, 120, 240. The default is 60. LVDS18G, LVDS33, LVDS25, LVPECL33, LVPECL25, MINILVDS33, MINILVDS25, RSDS33, RSDS25, SLVSE15, SUBLVDS33, SUBLVDS25, LCMDS33, LCMDS25 100 HSTL15I, HSTL15II, HSUL18I, HSUL18II, HSTL12I, HSTL12II, HSTL135I, HSTL135II 50 Direction: Inout
-OUT_DRIVE <value>
Sets the strength of the output buffer to 1.5, 2, 3.5, 4, 6, 8, 10, 12, 16, or 20 in mA, weakest to strongest. The list of I/O standards for which you can change the output drive and the list of values you can assign for each I/O standard is family-specific. Not all I/O standards have a selectable output drive strength.
Each I/O standard has a different range of legal output drive strength values. The values you can choose depend on which I/O standard you specified for this command. The following table lists the acceptable values.
Table 10-21. -OUT_DRIVE Values I/O Standard Values GPIO LVCMOS12 2, 4, 6, 8. Default is 8. LVCMOS15 2, 4, 6, 8, 10. Default is 8. LVCMOS18 2, 4, 6, 8, 10, 12. Default is 8. LVCMOS25 2, 4, 6, 8, 12, 16. Default is 8. LVCMOS33, LVTTL 2, 4, 8, 12, 16, 20. Default is 8. LVDS18G, LVDS25, LVDS33, MINILVDS25, MINILVDS33, LCMDS33, LCMDS25 3, 3.5, 4, 6. Default is 6. PPDS25, PPDS33, RSDS25, RSDS33 1.5, 2, 3. Default is 3. SUBLVDS25, SUBLVDS33 1, 1.5, 2. Default is 2. BUSLVDSE25, MLVDSE25, LVPECLE33 16 MIPIE25, SLVSE15 8 PCI 20 HSIO LVCMOS12, LVCMOS15 2, 4, 6, 8, 10. Default is 8. LVCMOS18 2, 4, 6, 8, 10, 12. Default is 8. SLVSE15 8 Direction: Output
- -IMPEDANCE
Sets the impedance value in Ohms.
Values vary depending on the I/O standards.
Direction: Output
- -SOURCE_TERM
Near-end termination for a differential output I/O. The following table lists the acceptable values.
Table 10-22. -SOURCE_TERM Values I/O Standards Values LVDS18G, LVDS25, LVDS33, MINILVDS25, MINILVDS33, LCMDS33, LCMDS25, PPDS25, PPDS33, RSDS25, RSDS33, SUBLVDS25, SUBLVDS331 OFF, 100. The default is OFF. Direction: Output
- -IN_DELAY
Sets the input delay.
Input delay applies to all I/O standards. The values are OFF and 0–127, 128, 130, 132,...254. The default value is OFF.
Direction: Input
Note: This attribute does not appear in the I/O attributes and cannot be used in the PDC for some I/Os with dynamic delays, such as DDR I/Os.- -OUT_DELAY
Sets the output delay.
Output delay applies to all I/O standards. The values are OFF and 0–127. The default value is OFF.
Direction: Output
Note:- This attribute does not appear in the I/O attributes and cannot be used in the PDC for some I/Os with dynamic delays, such as DDR I/Os.
- In case of LVDS fail-safe mode, you can use the following PDC commands:
- Weak pull-up/pull-down resistor for differential inputs.
set_io -RES_PULL <value>
- Dynamic ODT access per I/O.
set_io -ODT DYNAMIC
- Weak pull-up/pull-down resistor for differential inputs.
Examples
set_io -port_name IO_in\[2\]
-io_std LVCMOS25 \
-fixed true\
I/O Directions Not Supported
The following table lists the I/O directions that are not supported for I/O standards.
I/O Direction | IO_STD Value |
---|---|
Input | SLVSE15, MLVDSE25, BUSLVDSE25, MIPIE33, LVPECLE33, SHIELD33, SHIELD25, SHIELD18, SHIELD15, SHIELD135, SHIELD12 |
Output | SLVS33, SLVS25, HCSL33, HCSL25, LVPECL33, LVPECL25, MIPI25, LVDS18, RSDS18, MINILVDS18, SUBLVDS18, PPDS18, SLVS18, HCSL18, LCMDS18 |
Tribuff | SLVS33, SLVS25, HCSL33, HCSL25, LVPECL33, LVPECL25, MIPI25, LVDS18, RSDS18, MINILVDS18, SUBLVDS18, PPDS18, SLVS18, HCSL18, LVDS18G, LVDS25, LVDS33, RSDS25, RSDS33, MINILVDS25, MINILVDS33, SUBLVDS25, SUBLVDS33, PPDS25, PPDS33, LCMDS25, LCMDS33, LCMDS18 |
Inout | LVDS18G, LVDS33, LVDS18, LVDS25, RSDS18, RSDS33, RSDS25, MINILVDS18, MINILVDS33, MINILVDS25, SUBLVDS18, SUBLVDS33, SUBLVDS25, PPDS18, PPDS33, PPDS25, SLVS33, SLVS25, HCSL33, HCSL25, LVPECL33, LVPECL25, MIPI25, MIPIE25, SLVS18, HCSL18, SHIELD33, SHIELD25, SHIELD18, SHIELD15, SHIELD135, SHIELD12, LCMDS25, LCMDS33, LCMDS18 |