4.1 On-board SDRAM Device(s) Initialization Sequence

Every DDR-SDRAM type has a specific initialization sequence that must be performed after system power-up. The required steps are a sequence of electrical patterns, executed by software by the microprocessor and applied to the memory device through the embedded DRAM controller (“MPDDRC”).

These settings are detailed in section “Multiport DDR-SDRAM Controller (MPDDRC)” of the SAMA5D2 Series data sheet. They are explained in a straightforward sequential manner below, for each kind of memory device. After the last step in the initialization sequence is issued, the SDRAM device is fully functional.

The tables in the following sub-chapters describe each initialization step with the necessary action (what needs to be done), the registers involved in that action, and the settings (values) to be written in the register fields.

Software support is provided with drivers and examples in the form of a software package.