24.2 Features

Flash Controller
  • PB-Bridge-D interface that provides access to the Flash controller registers
  • AHB Initiator for bus hosted reads the row programming data from SRAM
  • Write Protect for Program Flash (PFM)
    • Single page protection resolution
    • Protect “Less Than” Address
    • Protect “Greater Than or Equal to” Address
  • Individual page write protection for boot Flash (BFM)
  • Error-correction code (ECC) support
  • Supports chip and page erase
  • Supports Single Word, Quad Word and row program options
  • Supports flash Erase/Retry to increase Retention and Endurance
Flash Memory
  • 128-bit wide Flash Memory Access
  • 4 Kbytes page size
  • Row size is 1 KB (256 IW)
  • Flash-based OTP (one-time-programmable) page

The Flash controller allows the Flash memory to be accessed through the following methods:

  1. Run-Time Self-Programming (RTSP)
  2. Serial Wire Debug (SWD) programming using DSU (See Device Service Unit (DSU) from Related Links and PIC32CX-BZ2 Programming Specification.)