38.6.2 Operation During Idle Mode

For the ADC, the stop in the Idle Mode bit, SIDL (ADCCON1[13]), specifies whether the ADC module stops on Idle or continues on Idle. If SIDL = 0, the ADC module continues normal operation when the device enters the Idle mode. If any of the ADC interrupts are enabled, the device wakes up from the Idle mode when the ADC interrupt occurs. The program execution resumes at the ADC ISR if the ADC interrupt is greater than the current CPU priority. Otherwise, execution continues from the instruction after the WAIT instruction that placed the device in the Idle mode.

If SIDL =1, the ADC module stops in the Idle mode. If the device enters the Idle mode during a conversion, the conversion is aborted. The converter cannot resume a partially completed conversion on exiting from the Idle mode.