41.6.3.2.1 Burst Mode

In this mode, the entire active pixel line is buffered into a FIFO and transmitted in a single packet with no interruptions. This transmission mode requires that the Input Video Pixel FIFO has the capacity to store a full line of active pixel data. This mode is optimized if the difference between the pixel required bandwidth and DSI link bandwidth is very different. This enables the DSI host to quickly dispatch the entire active video line in a single burst of data and then return to Low-Power mode.