41.6.3.2.2 Non-Burst Mode

In this mode, the processor uses the partitioning properties of the DSI host to divide the video line transmission into several DSI packets. This is done to match the pixel required bandwidth with the DSI link bandwidth. With this mode, the controller configuration does not require a full line of pixel data to be stored inside the input video pixel FIFO. It requires only the content of one video packet.

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