67.4.1 Power-Up and Power-Down

At power-up, from a power supply sequencing perspective, the SAM9X7 Series power supply inputs are categorized into three independent groups:

  • VDDCORE
  • VDDIN33
  • Periphery group containing all other power supply inputs except VDDBU

The figure below shows the recommended power-up sequence.

Note:
  • VDDBU
    • When supplied from a pre-charged storage element (battery or supercapacitor), VDDBU is an always-on supply input and is therefore not part of the power supply sequencing.
    • When no storage element is used on VDDBU in the application, VDDBU must be tied to VDDIN33.
    • When a supercapacitor is used in the application to power VDDBU during Backup mode, this element must be isolated from VDDBU during its (slow) charge, so that VDDBU closely follows VDDIN33. In table Power-up Timing Requirements, the parameter t0 limits the delay to establish VDDBU after VDDIN33.
  • VDDOUT25 is the output of the internal 2.5V VDDOUT25 regulator, therefore, there is no power supply requirement on this pin. VDDOUT25 is automatically started at VDDIN33 rise when VDDIN33 is above its Power-On-Reset threshold.
  • No board-level requirement on VDDMIPI as it is connected to VDDOUT25.
  • VDDLVDS requirements do not apply when VDDLVDS is connected to VDDOUT25.

NRST must be asserted low during the whole power-up sequence.

Figure 67-2. Recommended Power Sequence at Power-Up
Table 67-10. Power-Up Timing Requirements(1)
Symbol Parameters Conditions Min Max Unit
t0 VDDBU delay Delay from established VDDIN33 to established VDDBU – 0.2 ms
t1 VDDIN33 to periphery group delay Delay from established VDDIN33 to the first established Periphery Group supply -0.1 – ms
t2 Periphery group to VDDCORE delay Delay from the last established Periphery Group supply to VDDCORE supply turn-on 0 – ms
t3 Reset delay at power-up From established VDDCORE to NRST high 8 – ms
Note:
  1. The term "established" refers to a power supply established to 90% of its final value.

The following figure shows the SAM9X7 Series power-down sequence that starts by asserting the NRST line to 0. Once NRST is asserted, the supply inputs can be immediately shut down without any specific timing or order. VDDBU may not be shut down if the application uses a backup storage element on this supply input. When VDDIN33 falls below the negative-going threshold of the VDDIN33 power-on reset, the VDDOUT25 regulator is automatically shut down and its output is pulled low by an internal discharge resistor.

Figure 67-3. Recommended Power Sequence at Power-Down
Table 67-11. Power-Down Timing Requirements
Symbol Parameters Conditions Min Max Unit
tRSTPD NRST delay at power-down Delay from NRST low to the first supply out of its operating range 0 – ms