26.5.10 Slave Control B
| Name: | SCTRLB |
| Offset: | 0x0A |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ACKACT | CMD[1:0] | ||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 | ||||||
Bit 2 – ACKACT Acknowledge Action
This bit defines the slave’s behavior under certain conditions defined by the bus protocol state and software interaction. The table below lists the acknowledge procedure performed by the slave if action is initiated by software. The acknowledge action is performed when TWI.SDATA is read or written, or when an execute command is written to the CMD bits in this register.
The ACKACT bit is not a flag or strobe, but an ordinary read/write accessible register bit.
| Value | Name | Description |
|---|---|---|
| 0 | ACK | Send ACK |
| 1 | NACK | Send NACK |
Bits 1:0 – CMD[1:0] Command
Unlike the acknowledge action bits, the slave command bits are strobes. These bits always read as zero. Writing to these bits trigger a slave operation as defined in the table below.
| CMD[1:0] | DIR | Description |
|---|---|---|
| 0x0 - NOACT | X | No action |
| 0x1 | X | Reserved |
| 0x2 - COMPTRANS | Used to complete a transaction. | |
| 0 | Execute Acknowledge Action succeeded by waiting for any START (S/Sr) condition. | |
| 1 | Wait for any START (S/Sr) condition. | |
| 0x3 - RESPONSE | Used in response to an address interrupt (APIF). | |
| 0 | Execute Acknowledge Action succeeded by reception of next byte. | |
| 1 | Execute Acknowledge Action succeeded by slave data interrupt. | |
| Used in response to a data interrupt (DIF). | ||
| 0 | Execute Acknowledge Action succeeded by reception of next byte. | |
| 1 | Execute a byte read operation followed by Acknowledge Action. | |
The acknowledge action bits and command bits can be written at the same time.