23.5.15 Counter Register
The TCEn.CNTL and TCEn.CNTH register pair represents the 16-bit value, TCEn.CNT. The low byte [7:0] (suffix L) is accessible at the
original offset. The high byte [15:8] (suffix H) can be accessed at offset +
0x01. CPU and UPDI write access has priority over internal updates of the register.
| Name: | CNT |
| Offset: | 0x20 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| | CNT[15:8] | |
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | CNT[7:0] | |
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 15:8 – CNT[15:8] Counter High
Byte
This bit field holds
the MSB of the 16-bit Counter register.
Bits 7:0 – CNT[7:0] Counter Low
Byte
This bit field holds
the LSB of the 16-bit Counter register.
