23.5.21 Compare n Buffer Register
The TCEn.CMPnBUFL and TCEn.CMPnBUFH register pair represents the 16-bit value,
TCEn.CMPnBUF. The low byte [7:0] (suffix L) is accessible at the
original offset. The high byte [15:8] (suffix H) can be accessed at offset +
0x01.
This register serves as the buffer for the associated compare registers (TCEn.CMPn). Accessing these registers using the CPU or UPDI will affect the corresponding CMPnBV status bit.
When the SCALE bitfield in TCEn.CTRLD is written
to ‘
1’, the data written to the CMPnBUF register are expected to be
in fixed point UQ1.15 notation, giving a range from 0 to 2 - 2-15. If
AMPEN bitfield in TCEn.CTRLD is ‘0’, a write to the TCEn.CMPnBUFH
register triggers a multiplication with the Period (TCEn.PER) register, and the
resulting data are stored in the CMPnBUF register. When AMPEN =
‘1’, the written value is multiplied by the Amplitude (TCEn.AMP)
register, and the Offset (TCEn.OFFSET) register is added.Note: The data read from the TCEn.CMPnBUF register are the resulting values after
multiplication and add operations.
| Name: | CMPnBUF |
| Offset: | 0x38 + n*0x02 [n=0..3] |
| Reset: | 0x00 |
| Property: | - |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CMPBUFH[15:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CMPBUFL[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 15:8 – CMPBUFH[15:8] Compare High Byte
This bit field holds the MSB of the 16-bit Compare Buffer register.
Bits 7:0 – CMPBUFL[7:0] Compare Low Byte
This bit field holds the LSB of the 16-bit Compare Buffer register.