33.5.11 Command

Bit 7 – DIFF Differential

This bit controls whether the ADC conversion is Single-Ended or Differential.

Value	Description
0x0	Unsigned Single-Ended conversion. Only the ADCn.MUXPOS register is used.
0x1	Signed Differential conversion. Both the ADCn.MUXPOS and ADCn.MUXNEG registers are used.

This bit field controls the conversion mode for the ADC. Switching from one of the accumulation modes to a Single mode will reset the accumulator.

Value	Name	Description
0x0	SINGLE_8BIT	Single conversion with 8-bit resolution
0x1	SINGLE_12BIT	Single conversion with 12-bit resolution
0x2	SERIES	Series with accumulation, a separate trigger for every 12-bit conversion
0x3	SERIES_SCALING	Series with accumulation and scaling, a separate trigger for every 12-bit conversion
0x4	BURST	Burst with accumulation. One trigger will run SAMPNUM 12-bit conversions in one sequence.
0x5	BURST_SCALING	Burst with accumulation and scaling. One trigger will run SAMPNUM 12-bit conversions in one sequence.
Other	-	Reserved

This bit field starts or stops an ADC conversion or controls how an ADC conversion will start.

Note: If the ENABLE bit in ADCn.CTRLA is ‘0’ when writing the START bit field to IMMEDIATE, it will automatically be set to STOP.

Value	Name	Description
0x0	STOP	Stop an ongoing conversion
0x1	IMMEDIATE	Start a conversion immediately. This will be set back to STOP when the conversion is done unless Free-Running mode is enabled.
0x2	MUXPOS_WRITE	Start when a write to the MUXPOS register is done
0x3	MUXNEG_WRITE	Start when a write to the MUXNEG register is done
0x4	EVENT_TRIGGER	Start when an event is received by the ADC
Other	-	Reserved