24.5.3 PMD3 - Peripheral Module Disable 3 Register
Note: This register’s bits are only writable when
CFGCON0.PMDLOCK =
0
.Name: | PMD3 |
Offset: | 0x0100 |
Reset: | 0x00000000 |
Property: | - |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
CAN1MD | CAN0MD | ETHMD | USBMD | ||||||
Access | R/W/L | R/W/L | R/W/L | R/W/L | |||||
Reset | 0 | 0 | 0 | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
TCC2MD | TCC1MD | TCC0MD | TC9MD | TC8MD | |||||
Access | R/W/L | R/W/L | R/W/L | R/W/L | R/W/L | ||||
Reset | 0 | 0 | 0 | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
TC7MD | TC6MD | TC5MD | TC4MD | TC3MD | TC2MD | TC1MD | TC0MD | ||
Access | R/W/L | R/W/L | R/W/L | R/W/L | R/W/L | R/W/L | R/W/L | R/W/L | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
QEIMD | SER6MD | SER5MD | SER4MD | SER3MD | SER2MD | SER1MD | SER0MD | ||
Access | R/W/L | R/W/L | R/W/L | R/W/L | R/W/L | R/W/L | R/W/L | R/W/L | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 26, 27 – CANnMD CANn Module Disable (n=0...1)
Note: This bit is only writable when CFGCON0.PMDLOCK =
0
Value | Description |
---|---|
1 | Disables the CANn module |
0 | Enables the CANn module |
Bit 25 – ETHMD Ethernet Module Disable
Note: This bit is only writable when CFGCON0.PMDLOCK =
0
Value | Description |
---|---|
1 | Disables the Ethernet module |
0 | Enables the Ethernet module |
Bit 24 – USBMD USB Module Disable
Note: This bit is only writable when CFGCON0.PMDLOCK =
0
Value | Description |
---|---|
1 | Disables the USB module |
0 | Enables the USB module |
Bits 20, 21, 22 – TCCnMD TCCn Module Disable (n=0...2)
Note: This bit is only writable when CFGCON0.PMDLOCK =
0
Value | Description |
---|---|
1 | Disables the TCCn module |
0 | Enables the TCCn module |
Bits 8, 9, 10, 11, 12, 13, 14, 15, 16, 17 – TCnMD TCn Module Disable (n=0...9)
Note: This bit is only writable when CFGCON0.PMDLOCK =
0
Value | Description |
---|---|
1 | Disables the TCn module |
0 | Enables the TCn module |
Bit 7 – QEIMD QEI Module Disable
Note: This bit is only writable when CFGCON0.PMDLOCK =
0
Value | Description |
---|---|
1 | Disables the QEI module |
0 | Enables the QEI module |
Bits 0, 1, 2, 3, 4, 5, 6 – SERnMD SERCOM Module Disable (n=0...6)
Note: This bit is only writable when CFGCON0.PMDLOCK =
0
Value | Description |
---|---|
1 | Disables the SERCOMn module |
0 | Enables the SERCOMn module |