19.2.1 Matrix Hosts
The MATRIX manages the Hosts listed in he following table. Each Host can perform an access to an available Client concurrently with other Hosts. The following table lists the available Hosts.
Each Host has its own specifically-defined decoder. To simplify addressing, all the Hosts have the same decodings.
| Host Index | Name |
|---|---|
| 0 | Cortex-M7 |
| 1 | Cortex-M7 |
| 2 | Cortex-M7 Peripheral Port |
| 3 | Integrated Check Monitor |
| 4, 5 | XDMAC |
| 6 | ISI DMA |
| 7 | Media LB |
| 8 | USB DMA |
| 9 | Ethernet MAC DMA |
| 10 | CAN0 DMA |
| 11 | CAN1 DMA |
| 12 | Cortex-M7 |
Note: Host 12 (Cortex-M7) is only on revision
B.