38.2.1 Extended Instruction Syntax

Most of the extended instructions use indexed arguments, using one of the File Select Registers and some offset to specify a source or destination register. When an argument for an instruction serves as part of Indexed Addressing, it is enclosed in square brackets (“[ ]”). This is done to indicate that the argument is used as an index or offset. MPASM™ Assembler will flag an error if it determines that an index or offset value is not bracketed.

When the extended instruction set is enabled, brackets are also used to indicate index arguments in byte-oriented and bit-oriented instructions. This is in addition to other changes in their syntax. For more details, see 38.2.3.1 Extended Instruction Syntax with Standard PIC18 Commands.

Important: In the past, square brackets have been used to denote optional arguments in the PIC18 and earlier instruction sets. In this text and going forward, optional arguments are denoted by braces (“{ }”).
Table 38-3. Extensions to the PIC18 Instruction Set
Mnemonic,

Operands

Description Cycles 16-Bit Instruction Word Status

Affected

MSb LSb
ADDFSR f, k Add literal to FSR 1
1110
1000
ffkk
kkkk
None
ADDULNK k Add literal to FSR2 and return 2
1110
1000
11kk
kkkk
None
CALLW Call subroutine using WREG 2
0000
0000
0001
0100
None
MOVSF zs, fd

Move zs (source) to 1st word

2
1110
1011
0zzz
zzzz
None
fd (destination) 2nd word
1111
ffff
ffff
ffff
MOVSS zs, zd

Move zs (source) to 1st word

2
1110
1011
1zzz
zzzz
None

zd (destination) 2nd word

1111
xxxx
xzzz
zzzz
PUSHL k Store literal at FSR2, 
 decrement FSR2 1
1110
1010
kkkk
kkkk
None
SUBFSR f, k Subtract literal from FSR 1
1110
1001
ffkk
kkkk
None

SUBULNK

k

Subtract literal from FSR2 and
 return

2

1110
1001
11kk
kkkk

None