39.4.8 Analog-to-Digital Converter (ADC) Conversion Timing Specifications

Table 39-14. 
Standard Operating Conditions (unless otherwise stated)
Param No. Sym. Characteristic Min. Typ. † Max. Units Conditions
AD20 TAD ADC Clock Period 1 — 9 μs Using FOSC as the ADC clock source ADOCS = 0
AD21 1 2 6 μs Using FRC as the ADC clock source ADOCS = 1
AD22 TCNV Conversion Time(1) — 11+3TCY — TAD Set of GO/DONE bit to Clear of GO/ DONE bit
AD23 TACQ Acquisition Time — 2 — μs

* - These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. Does not apply for the ADCRC oscillator.
Figure 39-9. ADC Conversion Timing (ADC Clock FOSC-Based)
Figure 39-10. ADC Conversion Timing (ADC Clock from FRC)
Note:
  1. If the ADC clock source is selected as FRC, a time of TCY is added before the ADC clock starts. This allows the SLEEP instruction to be executed.