39.4.2 Internal Oscillator Parameters(1)

Table 39-8. 
Standard Operating Conditions (unless otherwise stated)
Param No. Sym. Characteristic Min. Typ. † Max. Units Conditions
OS50 FHFOSC Precision Calibrated HFINTOSC Frequency

4

8

12

16

32

48

64

MHz (Note 1, 2)
OS51 FHFOSCLP Low-Power Optimized HFINTOSC Frequency

1

2

MHz

MHz

Fundamental Freq.1 MHz

Fundamental Freq. 2 MHz

OS52 FMFOSC Internal Calibrated MFINTOSC Frequency 500 kHz
OS53* FLFOSC Internal LFINTOSC Frequency 31 kHz
OS54* THFOSCST HFINTOSC(3) Wake-up from Sleep Start-up Time

14

100

20

μs

μs

VREGPM=0x

VREGPM=1x

System Clock at 4 MHz

OS56 TLFOSCST LFINTOSC Wake-up from Sleep Start-up Time 0.3 ms

* - These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to the device as possible. 0.1 μF and 0.01 μF values in parallel are recommended.
  2. See the figure below.
  3. HFINTOSC clock = 4 MHz
Figure 39-5. Precision Calibrated HFINTOSC Frequency Accuracy Over Device VDD and Temperature