22.6.1 CCPxCON
Note:
- The set and clear operations of
the Compare mode are Reset by setting MODE =
'0000'
. - When MODE =
'0001'
or'1011'
, then the timer associated with the CCP module is cleared. TMR1 is the default selection for the CCP module, so it is used for indication purpose only.
Name: | CCPxCON |
Address: | 0xFAB,0xFA7 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
EN | OUT | FMT | MODE[3:0] | ||||||
Access | R/W | RO | R/W | R/W | R/W | R/W | R/W | ||
Reset | 0 | x | 0 | 0 | 0 | 0 | 0 |
Bit 7 – EN CCP Module Enable bit
Value | Description |
---|---|
1 |
CCP is enabled |
0 |
CCP is disabled |
Bit 5 – OUT CCP Output Data bit (read-only)
Bit 4 – FMT CCPW (pulse-width) Value Alignment bit
Value | Name | Description |
---|---|---|
x |
Capture mode | Not used |
x |
Compare mode | Not used |
1 |
PWM mode | Left-aligned format |
0 |
PWM mode | Right-aligned format |
Bits 3:0 – MODE[3:0] CCP Mode Select bits
MODE | Operating Mode | Operation | Set CCPxIF |
---|---|---|---|
11xx |
PWM | PWM Operation | Yes |
1011 |
Compare | Pulse output; clear TMR1(2) | Yes |
1010 |
Pulse output | Yes | |
1001 |
Clear output(1) | Yes | |
1000 |
Set output(1) | Yes | |
0111 |
Capture | Every 16th rising edge of CCPx input | Yes |
0110 |
Every 4th rising edge of CCPx input | Yes | |
0101 |
Every rising edge of CCPx input | Yes | |
0100 |
Every falling edge of CCPx input | Yes | |
0011 |
Every edge of CCPx input | Yes | |
0010 |
Compare | Toggle output | Yes |
0001 |
Toggle output; clear TMR1(2) | Yes | |
0000 |
Disabled | — |