25.8 Rising Edge and Reverse Dead Band
In Half-Bridge mode, the rising edge dead band delays the turn-on of the CWGxA output after the rising edge of the CWG data input. In Full-Bridge mode, the reverse dead-band delay is only inserted when changing directions from Forward mode to Reverse mode, and only the modulated output CWGxB is affected.
The CWGxDBR25.15.8 CWGxDBR register determines the duration of the dead-band interval on the rising edge of the input source signal. This duration is from 0 to 64 periods of the CWG clock.
Dead band is always initiated on the edge of the input source signal. A count of zero indicates that no dead band is present.
If the input source signal reverses polarity before the dead-band count is completed, then no signal will be seen on the respective output.
0, the buffer is loaded when
CWGxDBR is written. When EN = 1, then the buffer
will be loaded at the rising edge following the first falling edge of the data input, after
the LD bit is set. Refer to the following figure for an example.