9.2.3 BOR Controlled by Software

When the BOREN bits of Configuration Words are programmed to ‘01’, the BOR is controlled by the SBOREN bit. The device start-up is not delayed by the BOR ready condition or the VDD level.

BOR protection begins as soon as the BOR circuit is ready. The status of the BOR circuit is reflected in the BORRDY bit.

BOR protection is unchanged by Sleep.

Table 9-1. BOR Operating Modes
BOREN[1:0] SBOREN Device Mode BOR Mode Instruction Execution upon:
Release of POR Wake-up from Sleep
11 X X Active Wait for release of BOR (BORRDY = 1) Begins immediately
10 X Awake Active Wait for release of BOR (BORRDY = 1) N/A
Sleep Hibernate N/A Wait for release of BOR (BORRDY = 1)
01 1 X Active Wait for release of BOR (BORRDY = 1) Begins immediately
0 X Hibernate
00 X X Disabled Begins immediately
Note:
  1. In this specific case, “Release of POR” and “Wake-up from Sleep”, there is no delay in start-up. The BOR ready flag, (BORRDY = 1), will be set before the CPU is ready to execute instructions because the BOR circuit is forced on by the BOREN[1:0] bits
Figure 9-2. Brown-out Situations
Note: TPWRT delay only if PWRTE bit is programmed to ‘0’.