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Features
- AVR CPU in Dual-Core
Lockstep (DCLS) Configuration
- Running at up
to 20 MHz
- Single-cycle
I/O access
- Two-level
interrupt controller
- Two-cycle
hardware multiplier
- Supply
voltage range: 2.7-5.5V
- Memories
- 32 KB in-system-programmable Flash memory with ECC
- 4 KB SRAM with ECC
- 256B EEPROM
with ECC
- 512B of user
row in Non-Volatile Memory (NVM) that can keep data during
chip-erase and be programmed while the device is
locked
- 256B of Boot
Row for cryptographic keys, only readable from the Boot
Section
- System
- Power-on Reset (POR)
- Brown-out Detector (BOD) with programmable levels
- Voltage
Regulator Monitor (VMON)
- Clock options
- High-precision internal oscillator with selectable
frequency up to 20 MHz
- PLL up to 48 MHz for high-frequency operation of
the TCD
- Internal 32.768 kHz oscillator
- External 32.768 kHz crystal oscillator
- External clock input
- High-frequency external crystal oscillator
- Clock Failure
Detection (CFD)
- Clock
Frequency Measurement (CFM)
- Single-pin
Unified Program and Debug Interface (UPDI)
- Three sleep
modes
- Idle with all peripherals running for immediate
wake-up
- Standby with a configurable operation of selected
peripherals
- Power-Down with full data retention
- Automated
Cyclic Redundancy Check (CRCSCAN) program memory scan
- Verification of the Boot Flash section
- CRC-16-CCITT or CRC-32 (IEEE 802.3)
- External
interrupt on all general-purpose pins
- Peripherals
- 6-channel
Event System for predictable and CPU-independent
inter-peripheral signaling
- One 16-bit
Timer/Counter type A (TCA) with three compare channels for
PWM and waveform generation
- Up to four
16-bit Timer/Counter type B (TCB) with input capture for
capture and signal measurements
- One 12-bit
Timer/Counter type D (TCD) optimized for power
control
- One 16-bit
Real-Time Counter (RTC) that can run from an external
crystal or internal oscillator
- Up to three
USARTs
- Operation modes: RS-485, LIN client, host SPI, and
IrDA
- Fractional baud rate generator, auto-baud, and
start-of-frame detection
- Two SPI with
host/client operation modes
- Two
I2C with simultaneous host/client
operation (dual mode) and dual address match
- One
Configurable Custom Logic (CCL) with up to six
programmable Lookup Tables (LUTs)
- Two 10-bit, 170 ksps, Analog-to-Digital
Converters (ADC) with independent voltage reference sources
- One 10-bit
Digital-to-Analog Converter (DAC)
- Three Analog
Comparators (AC)
- Up to two Zero Cross Detectors (ZCD)
- Internal
1.024V, 2.048V, 4.096V and 2.500V voltage references, and
external reference option
- System Integrity
Functions
- Error
Controller (ERRCTRL)
- Central interface for fault detection
- Fault handling in hardware according to
programmable severity
- Optional Heartbeat output
- Optional tri-stating of all I/O pins in case of
fault
- Parity on
data buses
- Dual
Watchdogs
- Synchronous Watchdog Timer (SWDT)
- Watchdog Timer (WDT) with window mode and
separate on-chip oscillator with clock failure
detection
- Voltage Level
Monitor (VLM) with interrupt
- Program and Debug Interface Disable (PDID)
- I/O and Packages
- Up to 25 programmable I/O pins
- Multi-voltage
I/O with built-in voltage level converters
- 20-pin SSOP
- 28-pin VQFN,
SSOP, and SPDIP
- 32-pin VQFN
and TQFP
- Temperature Ranges
- Industrial:
-40°C to +85°C
- Extended:
-40°C to +125°C