Introduction

The AVR® SD Family microcontrollers, designed in compliance with the ISO 26262 functional safety standard, incorporate the AVR® CPU with a hardware multiplier running at clock speeds up to 20 MHz. They offer 32/64 KB of Flash, 4/8 KB of SRAM, and 256 bytes of EEPROM. The microcontrollers are available in 20-, 28-, 32- and 48-pin packages. The family uses our latest technologies, with a flexible and low-power architecture, including an Event System, accurate analog features, and advanced digital peripherals. The AVR® SD provides a dual-core lockstep CPU, Single-Error Correcting and Double-Error Detecting (SECDED) ECC on Flash, EEPROM and SRAM, Error Controller for functional safety, and Program and Debug Interface Disable (PDID) for security.