13.4.3.1.3 Prescaler

The CFD has a prescaler to generate the safe clock from the OSC32K oscillator. The prescaler setting is controlled by the Clock Failure Detector Prescaler bit (CFDPRESC) in the CFDCTRL register. The prescaler allows the OSC32K oscillator to be scaled down to ensure that the safe clock frequency is not higher than the XOSC32K clock frequency monitored by the CFD.

The prescaler settings are either no prescaling (OSC32K) or divided by 2 (OSC32K/2). The prescaler is applied to both outputs (32.768 kHz and 1.024 kHz) of the safe clock.

CFD Prescaler Example

For an external crystal oscillator at 32.768 kHz and an OSC32K frequency of 32.768 kHz, the CFDPRESC bit in the CFDCTRL register should be set to '0' to provide a safe clock of equal frequency.