26.6.6 Interrupt Flag Software Set
- This register allows the user to manually set an interrupt flag by software to test the ISR, and should be used solely for that purpose.
- Changes in this register will also be reflected in the Interrupt Flag Status and Clear (INTFLAG) register.
- Reading a bit in this register returns the status of the corresponding bit in the INTFLAG register.
| Name: | INTFLAGSET |
| Offset: | 0x18 |
| Reset: | 0x00000000 |
| Property: | Local Write-Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ERROR | READY | ||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 |
Bit 1 – ERROR Error
This flag is cleared by writing a ‘1’ to INTFLAG.ERROR.
This flag is set by writing a ‘1’ to this
bit.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit will set the Error interrupt
flag.
Bit 0 – READY NVM Ready
This flag is cleared by writing a ‘1’ to INTFLAG.READY.
This flag is set by writing a ‘1’ to this bit.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit will set the NVM Ready interrupt
flag.