26.6.1 Control B

When this bit field is written with the key value 0xA5, the command written to the Command bit field in the Control B register (CTRLB.CMD) will be executed. If a value different from the key value is used, the write will not be performed, and the Programming Error bit in the Status register (STATUS.PROGE) will be set. STATUS.PROGE is also set if a previously written command has not yet completed.

The key value must be written at the same time as CTRLB.CMD. If a command is issued through the APB bus on the same cycle as an AHB bus access, the AHB bus access will be given priority. The command will then be executed when both the NVM block and the AHB bus are idle.

The Ready flag in the Interrupt Flag Status and Clear register (INTFLAG.READY) must be '1' when the command is issued.

Bit 0 of the CTRLB.CMDEX bit field will read back as '1' until the command is issued.

This bit field defines the command to be executed when the correct key is written to the Command Execution bit field in the Command register (CTRLB.CMDEX). Write to this bit field to enable or issue a command. The Chip Erase command is started when the command is written. The others enable an erase or write operation. The operation is started by performing a store to the address location. A change from one command to another should always go through NOCMD or NOOP. If an attempt is made to write a programming command while the Flash is busy, STATUS.PROGE is set.