22.6.14 Period
Note: This register is write-synchronized:
SYNCBUSY.PER must be checked to ensure the PER register synchronization is complete.
Important: PER register updates
using the DMA are not possible in Standby mode.
| Name: | PER |
| Offset: | 0x1B |
| Reset: | 0xFF |
| Property: | Write-Synchronized |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PER[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
Bits 7:0 – PER[7:0] Period Value
This bit field holds the value of the TC period count.