7.1.7 FPRxEND Configuration Register
| Name: | FPRxEND |
| Offset: | 0x7F4008, 0x7F4018,
0x7F4028, 0x7F4038, 0x7F4048, 0x7F4058, 0x7F4068, 0x7F4078 |
Legend: R =
Readable bit; W = Writable bit
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| | | | | | | | | | |
| Access | | | | | | | | | |
| Reset | | | | | | | | | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| | | END[22:16]
| |
| Access | | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| | END[15:12]
| END[11:0] | |
| Access | R/W | R/W | R/W | R/W | R | R | R | R | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | END[11:0] | |
| Access | R | R | R | R | R | R | R | R | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
Bits 22:12 – END[22:12] End Address Offset
LSb bits
Protection region end address
offset (most significant bits)
Bits 11:0 – END[11:0] End Address Offset
LSb bits
Protection region end address
offset (least significant bits) fixed value 0xFFF
