| Error Messages |
| E0101_SIM_FAILED_TO_DISASSEMBLE_INSTRUCTION |
E0101-SIM: Failed to disassemble instruction |
| E0102_SIM_INVALID_INSTRUCTION |
E0102-SIM: Invalid Instruction address |
| E0103_SIM_FAILED_TO_PARSE_SCL |
E0103-SIM: Failed to parse SCL |
| E0104_SIM_NO_VALUE_AVAILABLE |
E0104-SIM: No value available |
| E0105_SIM_FAILED_TO_INIT_PERIPHERAL |
E0105-SIM: Failed to init peripheral |
| E0106_SIM_ATTEMPT_TO_SET_PIN |
E0106-SIM: Attempt to set pin instead of signal |
| E0107_SIM_SFR_UPDATE_EXCEPTION |
E0107-SIM: An SFR Update method has thrown an exception: {0} |
| E0108_SIM_FAILED_OPERATION |
E0108-SIM: Failed simulator operation: {0} |
| E0109_SIM_FAILED_TO_CLOSE_FILE |
E0109-SIM: Failed to close UART file. |
| E0110_SIM_FAILED_TO_EXECUTE_INSTRUCTION |
E0110-SIM: Failed to execute instruction at {0}. |
| E0111_SIM_UNEXPECTED_INSTRUCTION |
E0111-SIM: Unexpected instruction {0}. |
| E0112_SIM_NO_PINS_IN_PIC_FILE |
E0112-SIM: No pins were found in device data file (PIC). |
| Warning Messages |
| W0001_CORE_BITREV_MODULO_EN |
W0001-CORE: Bit-reversed and Modulo addressing are both
enabled. |
| W0002_CORE_SECURE_MEMORYACCESS |
W0002-CORE: Secure memory access, occurred from instruction at
{0}. |
| W0003_CORE_SW_RESET |
W0003-CORE: Software Reset Instruction called at PC |
| W0004_CORE_WDT_RESET |
W0004-CORE: Watchdog Timer has caused a Reset. |
| W0005_CORE_IOPUW_RESET |
W0005-CORE: Illegal opcode or uninitialized WREG has caused a
reset. |
| W0006_CORE_CODE_GUARD_PFC_RESET |
W0006-CORE: Illegal Code Guard Access caused Illegal opcode
Reset. |
| W0007_CORE_DO_LOOP_STACK_UNDERFLOW |
W0007-CORE: Nested do loop stack pop resulted in stack
underflow. |
| W0008_CORE_DO_LOOP_STACK_OVERFLOW |
W0008-CORE: Nested do loop stack push resulted in stack
overflow. |
| W0009_CORE_NESTED_DO_LOOP_RANGE |
W0009-CORE: The nested do level in CORCON<DL> was out of range: 0
< |
| W0010_CORE_SIM32_ODD_WORDACCESS |
W0010-CORE: An odd address WORD was accessed in RAM or PROM
(flash). |
| W0011_CORE_SIM32_UNIMPLEMENTED_RAMACCESS |
W0011-CORE: Access attempt to unimplemented RAM memory. |
| W0012_CORE_STACK_OVERFLOW_RESET |
W0012-CORE: Device Resets on stack overflow. |
| W0013_CORE_STACK_UNDERFLOW_RESET |
W0013-CORE: Device Resets on stack underflow. |
| W0014_CORE_INVALID_OPCODE |
W0014-CORE: Invalid opcode {0} |
| W0015_CORE_INVALID_ALT_WREG_SET |
W0015-CORE: Invalid alternate register set specified in
CTXTSTAT.CCTXI {0} |
| W0016_CORE_STACK_ERROR |
W0016-CORE: Trap due to stack error, occurred from instruction at
{0}. |
| W0017_CORE_ODD_RAMWORDACCESS |
W0017-CORE: Trap due to misaligned data word access, occurred from
instruction at {0}. |
| W0018_CORE_UNIMPLEMENTED_RAMACCESS |
W0018-CORE: Trap due to unimplemented RAM memory access, occurred
from instruction at {0}. |
| W0019_CORE_UNIMPLEMENTED_PROMACCESS |
W0019-CORE: Trap due to unimplemented FLASH memory access, occurred
from instruction at {0}. |
| W0020_CORE_ACCESS_NOTIN_X_SPACE |
W0020-CORE: Trap due to memory access outside X data space, occurred
from instruction at {0}. |
| W0021_CORE_ACCESS_NOTIN_Y_SPACE |
W0021-CORE: Trap due to memory access outside Y data space, occurred
from instruction at {0}. |
| W0022_CORE_XMODEND_LESS_XMODSRT |
W0022-CORE: XMODEND is less than XMODSRT. |
| W0023_CORE_YMODEND_LESS_YMODSRT |
W0023-CORE: YMODEND is less than YMODSRT. |
| W0024_CORE_BITREV_MOD_IS_ZERO |
W0024-CORE: In bit-reversed mode and the modifier is 0. |
| W0025_CORE_HARD_TRAP |
W0025-CORE: Reset due to Hard Trap from Low Priority Trap while
processing Higher Priority Trap at {0}. |
| W0026_CORE_UNIMPLEMENTED_MEMORYACCESS |
W0026-CORE: Trap due to unimplemented RAM or PSV memory access,
occurred from instruction at {0}. |
| W0027_CORE_UNIMPLEMENTED_EDSACCESS |
W0027-CORE: Trap due to Page 0 EDS memory access, occurred from
instruction at {0}. |
| W0028_TBLRD_WORM_CONFIG_MEMORY |
W0028-CORE: Simulator does not support WORM Configuration memory.
Read WORM config memory in range 0x{0} to 0x{1} probably will not give
you the same result as real device. |
| W0029_TBLRD_DEVICE_ID |
W0029-CORE: Simulator does not support Device ID section. Read
address 0x{0}, which is in the Device ID section, probably will not give
you the same result as real device. |
| W0030_CORE_UNIMPLEMENTED_MEMORY_ACCESS |
W0030-CORE: Instruction at {0} attempted unimplemented memory access
({1}) |
| W0031_BSLIM_INSUFFICIENT_BOOT_SEGMENT |
W0031-CORE: Boot segment should be at least 2 pages to support
AIVT. |
| W0032_BSLIM_LIMITS_EXCEEDS_PROG_MEMORY |
W0032-CORE: BSLIM value exceeds available program memory
space. |
| W0033_CORE_UNPREDICTABLE_OPCODE |
W0033-CORE: Unpredictable opcode at {0} |
| W0034_CORE_UNALIGNED_MEMORY_ACCESS |
W0034-CORE: Unaligned memory access at {0} |
| W0035_CORE_UNIMPLEMENTED_RAMACCESS_NOTRAP |
W0035-CORE: Unimplemented RAM memory access, occurred from
instruction at {0}. |
| W0036_UNIMPLEMENTED_INSTRUCTION |
W0036-CORE: Unimplemented instruction: |
|
|
| W0040_FPU_DIFF_CP10_CP11 |
W0040-FPU: At {0}, UNPREDICTABLE due to different values in
CPACR.CP10 and CPACR.CP11. |
| W0041_FPU_ACCESS_DENIED |
W0041-FPU: At {0}, attempted access FPU, but FPU access privilege is
access denied. |
| W0042_FPU_PRIVILEGED_ACCESS_ONLY |
W0042-FPU: At {0}, attempted access FPU in unprivileged mode, but FPU
access privilege is privileged access only. |
| W0043_FPU_CP_RESERVED_VALUE |
W0043-FPU: At {0}, attempted access FPU, but CPACR.CP10 has reserved
value. |
| W0044_FPU_OUT_OF_RANGE |
W0044-FPU: At {0}, but ARM Cortex M7 only supports S0-S31 and
D0-D15. |
|
|
| W0051_INSTRUCTION_DIV_NOT_ENOUGH_REPEAT |
W0051-INSTRUCTION: New lightning divide instruction requires REPEAT
with an iteration count of 5, but your program only have {0}. The result
may not be correct. |
| W0052_INSTRUCTION_DIV_TOO_MANY_REPEAT |
W0052-INSTRUCTION: New lightning divide instruction only needs REPEAT
with an iteration count of 5, but iteration count of {0} will also give
the correct result. |
| W0053_INVALID_INTCON_VS_FIELD_VALUE |
W0053-INTCON: VS Field value selected is reserved. |
|
|
| W0101_SIM_UPDATE_FAILED |
W0101-SIM: Notified Update() method failed: {0} |
| W0102_SIM_PERIPH_MISSING |
W0102-SIM: Peripheral Missing: {0} |
| W0103_SIM_PERIPH_FAILED |
W0103-SIM: Peripheral Failed: {0} |
| W0104_SIM_FAILED_TO_INIT_TOOL |
W0104-SIM: Failed to init tool |
| W0105_SIM_INVALID_FIELD |
W0105-SIM: Invalid field value: {0} |
| W0106_SIM_PERIPH_PARTIAL_SUPPORT |
W0106-SIM: This device only has partial support for {0} peripheral.
{1} |
| W0107_SIM_NOT_SUPPORTED |
W0107-SIM: {0} may not be supported because {1}. |
| W0108_SIM_RESERVED_SETTING |
W0108-SIM: Reserved setting: {0} |
| W0109_SIM_PERIPHERAL_IN_DEVELOPMENT |
W0109-SIM: {0} peripheral still in development - should not be
used. |
| W0110_SIM_UNEXPECTED_EVENT |
W0110-SIM: Something unexpected happened, tell Microchip about it:
{0} |
| W0111_SIM_UNSUPPORTED_SELECTION |
W0111-SIM: The selection is not supported: {0} |
| W0112_SIM_INVALID_OPERATION |
W0112-SIM: The operation is not valid: {0} |
| W0113_SIM_WRITE_TO_PROTECTED_SFR |
W0113-SIM: A write to a protected SFR was attempted: {0} {1}. |
| W0114_SIM_INVALID_KEY |
W0114-SIM: Invalid KEY {0}. The correct PASSWD should be {1}. |
| W0115_SIM_FAILED_TO_PARSE_DEVICE_FILE |
W0115-SIM: Failed to parse device file: {0} |
| W0116_SIM_STACK_OVERFLOW |
W0116-SIM: Last push caused a stack overflow |
| W0117_SIM_STACK_UNDERFLOW |
W0117-SIM: Last pop caused a stack underflow |
| W0118_SIM_INVALID_FIELD_VALUE |
W0118-SIM: Invalid field value {0} |
| W0119_SIM_SAMPLING_RATE_VIOLATION |
W0119-SIM: Sampling rate too high for current limit set in
CTRLB.CURRLIMIT |
|
|
| W0201_ADC_NO_STIMULUS_FILE |
W0201-ADC: No stimulus file attached to the ADC output buffer:
{0} |
| W0202_ADC_GO_DONE_BIT |
W0202-ADC: The Go/Done bit must not be set in the same cycle as the
Enable bit. |
| W0203_ADC_MINIMUM_2_TAD |
W0203-ADC: A Minimum of 2 TADs are required before another conversion
should be started. |
| W0204_ADC_TAD_TOO_SMALL |
W0204-ADC: Tad time is less than: {0} |
| W0205_ADC_UNEXPECTED_TRANSITION |
W0205-ADC: Unexpected state transition (contact Microchip):
{0} |
| W0206_ADC_SAMP_TIME_TOO_SHORT |
W0206-ADC: Sample time too short: {0} |
| W0207_ADC_NO_PINS_SCANNED |
W0207-ADC: No pins scanned. |
| W0208_ADC_UNSUPPORTED_CLOCK_SOURCE |
W0208-ADC: Simulator does not support clock source, system clock
used: {0} |
| W0209_ADC_ANALOG_CHANNEL_DIGITAL |
W0209-ADC: Analog channel pin is configured as digital. |
| W0210_ADC_ANALOG_CHANNEL_OUTPUT |
W0210-ADC: Analog channel pin is configured as output. |
| W0211_ADC_PIN_INVALID_CHANNEL |
W0211-ADC: Selected channel is an invalid channel. The channel
selected: {0} |
| W0212_ADC_BAND_GAP_NOT_SUPPORTED |
W0212-ADC: Bandgap reference voltage not supported by
simulator |
| W0213_ADC_RESERVED_SSRC |
W0213-ADC: SSRC value not supported: {0} |
| W0214_ADC_POSITIVE_INPUT_DIGITAL |
W0214-ADC: Positive input pin is configured as digital. {0} |
| W0215_ADC_POSITIVE_INPUT_OUTPUT |
W0215-ADC: Positive input pin is configured as output. {0} |
| W0216_ADC_NEGATIVE_INPUT_DIGITAL |
W0216-ADC: Negative input pin is configured as digital. {0} |
| W0217_ADC_NEGATIVE_INPUT_OUTPUT |
W0217-ADC: Negative input pin is configured as output. {0} |
| W0218_ADC_REFERENCE_HIGH_DIGITAL |
W0218-ADC: ADC reference high pin is configured as digital. |
| W0219_ADC_REFERENCE_HIGH_OUTPUT |
W0219-ADC: ADC reference high pin is configured as output. |
| W0220_ADC_REFERENCE_LOW_DIGITAL |
W0220-ADC: ADC reference low pin is configured as digital. |
| W0221_ADC_REFERENCE_LOW_OUTPUT |
W0221-ADC: ADC reference low pin is configured as output. |
| W0222_ADC_OVERFLOW |
W0222-ADC: ADC input voltage high. ADC output overflow. |
| W0223_ADC_UNDERFLOW |
W0223-ADC: ADC input voltage low. ADC output underflow. |
| W0224_ADC_CTMU_NOT_SUPPORTED |
W0224-ADC: CTMU not supported. |
| W0225_ADC_INVALID_CH0S |
W0225-ADC: Invalid CH0S value. |
| W0226_ADC_VBAT_NOT_SUPPORTED |
W0226-ADC: Vbat not supported. |
| W0227_ADC_INVALID_ADCS |
W0227-ADC: Invalid ADCS value. |
| W0228_ADC_INVALID_ADCS |
W0228-ADC: No high reference pin found. |
| W0229_ADC_INVALID_ADCS |
W0229-ADC: No low reference pin found. |
| W0230_ADC_TRIGSEL_NOT_SUPPORTED |
W0230-ADC: TRIGSEL values other than default not supported. |
| W0231_ADC_NOT_WARMED |
W0231-ADC: Core({0}) enabled before warmed. |
| W0232_ADC_CALIBRATION_ABORTED |
W0232-ADC: Core({0}) calibration aborted before completed. |
| W0233_ADC_CORE_POWERED_EARLY |
W0233-ADC: Core({0}) xxxPWR bit set before ADON. |
| W0234_ADC_ALREADY_CALIBRATING |
W0234-ADC: Core({0}) Already calibrating when another calibration
request was made. |
| W0235_ADC_CAL_TYPE_CHANGED |
W0235-ADC: Core({0}) Calibration type changed while already
calibrating. |
| W0236_ADC_CAL_INVALIDATED |
W0236-ADC: Core({0}) Calibration invalidated. |
| W0237_ADC_UNKNOWN_DATASHEET |
W0237-ADC: ADC emulation does not support current datasheet {0} -
contact Microchip. |
| W0238_ADC_INVALID_SFR_FIELD_VALUE |
W0238-ADC: Invalid value for {0} ({1}) |
| W0239_ADC_UNSUPPORTED_INPUT |
W0239-ADC: ADC emulation does not support input from {0} |
| W0240_ADC_NOT_CALIBRATED |
W0240-ADC: Conversion started when not calibrated {0} |
| W0241_ADC_FRACTIONAL_NOT_ALLOWED |
W0241-ADC: Fractional format not allowed while using oversampling
digital filter |
| W0242_ADC_BG_INT_BEFORE_PWR |
W0242-ADC: REFCIE or REFERCIE enabled before ADC enabled - could
cause spurious interrupt |
| W0243_ADC_INVALID_TAD |
W0243-ADC: Invalid TAD {0} {1} |
| W0244_ADC_CONVERSION_ABORTED |
W0244-ADC: Conversion aborted |
| W0245_ADC_BUFREGEN_NOT_ALLOWED |
W0245-ADC: BUFREGEN has to be used with pins selected as input; using
FIFO instead. |
| W0246_ADC_ACCUMULATION_BAD_RESSEL |
W0246-ADC: > 1 samples selected in SAMPLENUM but RESSEL field not set
for 16 bits output - accumulating 12 bits samples. |
| W0247_ADC_CONVERSION_BAD_RESSEL |
W0247-ADC: 1 sample selected in SAMPLENUM but RESSEL field set for 16
bits output - taking a 12 bits sample. |
| W0248_ADC_WR_BEFORE_KEY_SEQ |
W0248-ADC: WR bit set before key sequence completed |
|
|
| W0400_PWM_PWM_FASTER_THAN_FOSC |
W0400-PWM: PWM{0} clock faster than Fosc |
|
|
| W0600_WDT_2ND_WDT_MR_WRITE |
w0600-WDT: WDT_MR written more than once at 0x{0} |
| W0601_WDT_EXPIRED |
W0601-WDT: WDT expired at {0} |
| W0601_WDT_RESET_OUTSIDE_WINDOW |
W0602-WDT: WDT cleared outside 0-WDD window at {0} |
|
|
| W0700_CLC_GENERAL_WARNING |
W0700-CLC: Simulator does not simulate the propagation delay, so the
output timing may not be accuracy and using the CLC output as its own
input will create a infinite circular loop. |
| W0701_CLC_CLCOUT_AS_INPUT |
W0701-CLC: Simulator does not support using the CLC output as its
own input. |
| W0702_CLC_CIRCULAR_LOOP |
W0702-CLC: Circular loop detected. This CLC output loopback as one
of its inputs. Simulator CLC output may become incorrect. |
|
|
| W0800_ACC_INPUT_INVALID_CONFIG |
W0800-ACC: Selected input pin configured incorrectly: {0} |
| W0801_ACC_INPUT_NOT_SUPPORTED |
W0801-ACC: Input {0} not supported |
| W0802_ACC_INVERTED_WINDOW_LIMITS |
W0802-ACC: Comparator pair {0} has upper limit below lower
limit |
| W0803_ACC_MISMATCHED_POS_INPUTS |
W0803-ACC: Comparator pair {0} has mismatched positive
inputs |
| W0804_ACC_WINDOW_COMP_DISABLED |
W0804-ACC: Comparator pair {0} has at least one of its comparators
disabled |
| W0805_ACC_WINDOW_COMPS_MODES |
W0805-ACC: Comparator pair {0} comparators have different
COMPCTRL#.SINGLE values |
| W0806_ACC_FEATURE_NOT_SUPPORTED |
W0806-ACC: Feature {0} is not supported in the simulator |
|
|
| W1201_DATAFLASH_MEM_OUTSIDE_RANGE |
W1201-DATAFLASH: Attempt to {0} memory at {1} outside of dataflash
memory range. |
| W1202_DATAFLASH_ERASE_WHILE_LOCKED |
W1202-DATAFLASH: Attempt to erase dataflash memory while
locked. |
| W1203_DATAFLASH_WRITE_WHILE_LOCKED |
W1203-DATAFLASH: Attempt to write dataflash memory while
locked. |
|
|
| W1401_DMA_PERIPH_NOT_AVAIL |
W1401-DMA: The desired peripheral is not available: {0}. |
| W1402_DMA_INVALID_IRQ |
W1402-DMA: The desired IRQ is not associated with a DMA peripheral:
{0}. |
| W1403_DMA_INVALID_SFR |
W1403-DMA: The peripheral address is not SFR expected with this IRQ:
{0}. |
| W1404_DMA_INVALID_DMA_ADDR |
W1404-DMA: The address is not a valid DMA address: {0}. |
| W1405_DMA_IRQ_DIR_MISMATCH |
W1405-DMA: The selected DMA direction is not that expected for the
selected IRQ: {0}. |
|
|
| W1600_PPS_INVALID_MAP |
W1600-PPS: Invalid attempt to map pin ({0}) to pin ({1}). |
| W1601_PPS_INVALID_PIN_DESCRIPTION |
W1601-PPS: Suspect database entry for PPS pin {0}. Contact
Microchip. |
|
|
| W1800_PWM_TIMER_SELECTION_NOT_AVIALABLE |
W1800-PWM: PWM timer selection {0} is not available or not
supported. |
| W1801_PWM_TIMER_SELECTION_BAD_CLOCK_INPUT |
W1801-PWM: TMR{0} clock input is not FOSC/4. It is required to have
FOSC/4 as the clock input to TMR{0} for correct PWM operation. |
| W1802_PWM_TIMER_MISSING_PERSCALER_INFO |
W1802-PWM: Simulator could not handle the PWM timer selection
prescaler. The PWM output could be invalid. |
|
|
| W2001_INPUTCAPTURE_TMR3_UNAVAILABLE |
W2001-INPUTCAPTURE: TMR3 is not available for this part. Capture
buffer will have a value of 0 for each TMR3 capture. |
| W2002_INPUTCAPTURE_CAPTURE_EMPTY |
W2002-INPUTCAPTURE: The capture buffer was empty. |
| W2003_INPUTCAPTURE_SYNCSEL_NOT_AVIALABLE |
W2003-INPUTCAPTURE: Source {0} is reserved or the source peripheral
is not available. |
| W2004_INPUTCAPTURE_BAD_SYNC_SOURCE |
W2004-INPUTCAPTURE: Source {0} should only be used as trigger
sources |
|
|
| W2501_OUTPUTCOMPARE_SYNCSEL_NOT_AVIALABLE |
W2501-OUTPUTCOMPARE: Source {0} is reserved or the source peripheral
is not available. |
| W2502_OUTPUTCOMPARE_BAD_SYNC_SOURCE |
W2502-OUTPUTCOMPARE: Source {0} should only be used as trigger
sources. |
| W2503_OUTPUTCOMPARE_BAD_TRIGGER_SOURCE |
W2503-OUTPUTCOMPARE: Source {0} should not be used as {1}trigger
source. |
|
|
| W2700_MPU_ILLEGAL_DREGION |
W2700-MPU: MPU_TYPE.DREGION was {0}. Only legal values are 8 and
16. |
| W2701_MPU_INVALID_REGION |
W2701-MPU: MPU_RNR.REGION was {0}. It must be less than {1}. |
|
|
| W3000_LPM_READ_PROTECTION_SECTION |
W3000-LPM: LPM executing at {0} is not allowed to read {1} with
current Boot Lock bits setting. |
|
|
| W3010_SPM_WRITE_PROTECTION_SECTION |
W3010-SPM: SPM is not allowed to write to {1} with current Boot Lock
bits setting. |
|
|
| W6001_RTT_FORBIDDEN_RTPRES |
W6001-RTT: Programming RTPRES to 1 or 2 is forbidden. |
| W6002_RTT_BAD_WRITING_ALMV |
W6002-RTT: Try to write a new ALMV value when ALMIEN in RTT_MR is
set. |
| W6003_RTT_BAD_WRITING_RTPRES |
W6003-RTT: Try to write a new RTPRES value when RTTINCIEN bit is
set. |
|
|
| W7001_SMT_CLK_SELECTION_NOT_SUPPORT |
W7001-SMT: SMT partial support for this device. If {0} is not the
clock selection for {1}, this clock selection is not support
yet. |
| W7002_SMT_SIG_SELECTION_NOT_SUPPORT |
W7002-SMT: SMT partial support for this device. If {0} is not the
signal selection for {1}, this signal selection is not support
yet. |
| W7003_SMT_WIN_SELECTION_NOT_SUPPORT |
W7003-SMT: SMT partial support for this device. If {0} is not the
window selection for {1}, this window selection is not support
yet. |
|
|
| W8001_OSC_INVALID_CLOCK_SOURCE |
W8001-OSC: Clock source selection invalid; OSC is not
enabled. |
| W8002_OSC_RESERVED_FEXTOSC |
W8002-OSC: Reserved External Oscillator mode Selection. Oscillator
not enabled. |
|
|
| W9001_TMR_GATE_AND_EXTCLOCK_ENABLED |
W9001-TMR: Gate control cannot be enabled at the same time as
external clock control. |
| W9002_TMR_NO_PIN_AVAILABLE |
W9002-TMR: Gate or external clock mode is enabled, but no pin is
available. |
| W9003_TMR_INVALID_CLOCK_SOURCE |
W9003-TMR: Clock source selection invalid; timer will not
increment. |
|
|
| W9201_UART_TX_OVERFLOW |
W9201-UART: Write attempted to a full FIFO buffer, data
lost. |
| W9202_UART_TX_CAPTUREFILE |
W9202-UART: Error opening Tx UART capture file: {0}. |
| W9203_UART_TX_INVALIDINTERRUPTMODE |
W9203-UART: Invalid Tx UART interrupt mode set: {0}. |
| W9204_UART_RX_EMPTY_QUEUE |
W9204-UART: Rx UART FIFO queue empty. |
| W9205_UART_TX_BADFILE |
W9205-UART: Could not write file: {0}. |
| W9206_UART_RESERVED_MODE |
W9206-UART: Selected Mode is either reserved or not yet supported:
{0}. |
| W9207_UART_UNABLETOCLOSE_FILE |
W9207-UART: Unable to close file: {0}. |
|
|
| W9401_CVREF_INVALIDSOURCESELECTION |
W9401-CVREF: Positive Source Selection option(11) is reserved.Do not
use.Positive Source is floating. |
| W9402_CVREF_INPUT_OUTPUTPINCONFLICT |
W9402-CVREF: Potential Scenario where output pin is looped back as
input. |
|
|
| W9601_COMP_FVR_SOURCE_UNAVAILABLE |
W9601-COMP:FVR Voltage source not available as input to this
Comparator. |
| W9602_COMP_DAC_SOURCE_UNAVAILABLE |
W9602-COMP:DAC Voltage Source Peripheral not yet implemented to act
as input to Comparator. |
| W9603_COMP_CVREF_SOURCE_UNAVAILABLE |
W9603-COMP:CVREF Voltage Source Peripheral not available as input to
this Comparator. |
| W9604_COMP_SLOPE_SOURCE_UNAVAILABLE |
W9604-COMP:Slope Generator Voltage Source Peripheral not available as
input to this Comparator. |
| W9605_COMP_PRG_SOURCE_UNAVAILABLE |
W9605-COMP:Programmable Ramp Generator Voltage Source Peripheral not
available as input to this Comparator. |
| W9607_COMP_DGTL_FLTR_OPTION_UNAVAILABLE |
W9607-COMP:Digital Filter selection reserved,SYSCLK will be used
instead. |
| W9609_COMP_DGTL_FLTR_CLK_UNAVAILABLE |
W9609-COMP:REFCLK3 not implemented,SYSCLK will be used
instead. |
|
|
| W9801_FVR_INVALID_MODE_SELECTION |
W9801-FVR:FVR Voltage Selection bits(11) not Valid.Reserved, Do not
use. |
|
|
| W9901_RTSP_INVALID_OPERATION_SELECTION |
W9901-RTSP:Reserved NVMOP Operation Selection bits. |
| W9902_RTSP_FLASH_PROGRAM_WRITE_PROTECTED |
W9902-RTSP:Flash Program Memory Location appears to be Write
Protected using CodeGuard. |
|
|
| W10001_RESERVED_IRQ_HANDLER_INVOKED |
W10001-IRQ:RESERVED IRQ is set for handling.Will be ignored. |
| W10002_UNSUPPORTED_CLK_SOURCE |
W10002-SYSTICK:External Clock selection is not yet supported. |
|
|
| W10101_UNSUPPORTED_CHANNEL_MODE |
W10101-UART:Channel Mode Selected is not yet supported. |
| W10102_UNSUPPORTED_CLK_SOURCE |
W10102-UART:PMC-Programmable Clock source is not yet supported.
|
| W10103_UNSUPPORTED_RECEIVER_FILTER |
W10103-UART:Receiver digital filter is not yet
supported.PPS_MISSING_SFR |
|
|
| W10301_NO_PORT_PINS_FOUND |
W10301-PORT:No port pins were found in device datafile |
|
|
| W10500_UNSUPPORTED_SOURCE |
W10500-EVSYS: Channel source selection unsupported by simulator
(channel {0}) |
