50.11 Internal Oscillator Parameters(1)

Table 50-8. Internal Oscillator
Standard Operating Conditions (unless otherwise stated)
Param No.Sym.CharacteristicMin.Typ. †Max.UnitsConditions
OS50FHFOSCPrecision Calibrated HFINTOSC Frequency—

4

8

12

16

32

48

64

—MHz(Note 2)
OS51FHFOSCLPLow-Power Optimized HFINTOSC Frequency0.911.1MHz-40°C ≤ TA ≤ +85°C

OS51A1.822.2MHz-40°C ≤ TA ≤ +85°C

OS51B0.8811.12MHz+85°C ≤ TA ≤ +125°C

OS51C1.7622.24MHz+85C ≤ TA ≤ +125°C

OS52*FMFOSCInternal Calibrated MFINTOSC Frequency—500—kHz
OS53*FLFOSCInternal LFINTOSC Frequency

—

31

—

kHz
OS54*THFOSCSTHFINTOSC Wake-up from Sleep Start-up Time—19—μs

VREGPM = 'b00

System Clock at 4 MHz

OS54A*—30—μs

VREGPM = 'b01

System Clock at 4 MHz

OS54B*—115—μs

VREGPM = 'b10

System Clock at 4 MHz

OS54C*—120—μs

VREGPM = 'b11

System Clock at 4 MHz

OS56*TLFOSCSTLFINTOSC Wake-up from Sleep Start-up Time—900—μs

VREGPM = 'b10 or'b11

* These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to the device as possible. 0.1 μF and 0.01 μF values in parallel are recommended.
  2. See the figure below.
Figure 50-5. Precision Calibrated HFINTOSC Frequency Accuracy Over Device VDD and Temperature