16.4.4 Reset State Priorities

The Reset State manager manages the priorities among the different reset sources. The resets are listed in order of priority as follows:

1. General reset
2. VDD3V3 Supply Monitor (SMVDD3V3) or VDD3V3 POR (PORVDD3V3) reset
3. VDDCORE Supply Monitor Reset
4. VDDCORE POR reset (backup reset)
5. User reset if RSTC_MR.URSTASYNC is set to 1
6. 32.768 kHz Crystal Oscillator Failure Detection reset
7. CPU Clock Failure Detection reset
8. Watchdog 0 or 1 reset
9. Software reset
10. User reset if RSTC_MR.URSTASYNC is set to 0

Specific cases are listed below:

• When in Watchdog reset:

  - The processor reset is active and so a Software reset cannot be programmed.

  - If RSTC_MR.URSTASYNC is set to 1 and a User reset occurs, it has a higher priority and a User reset is performed.

• When in Software reset:

  - A watchdog event has priority over the current state.

  - The NRST pin has no effect.

• When in User reset:

  - A watchdog event is impossible because the watchdog timer is being reset.

  - A Software reset is impossible, since the processor reset is being asserted.