27.11.13 MATRIX Protection Client Register x

This register can only be written if the WPEN bit is cleared in the Write Protection Mode Register.

Table 27-27. MATRIX_PSR Reset Values
Register MATRIX_	Matrix 0	Matrix 1	Matrix 2	Matrix 3
PSR0	0x00000000	0x00000000	0x00010101	0x00010101
PSR1	0x00000000	0x00010101	0x00010101	0x00010101
PSR2	0x00000000	0x00010101	0x00010101	0x00000000
PSR3	0x00010101	0x00010101	0x00000000	0x00000000
PSR4	0x00010101	0x00010101	0x00000000	0x00000000
PSR5	0x00000000	0x00000000	0x00000000	0x00000000
PSR6	0x00010101	0x00000000	0x00000000	0x00000000
PSR7	0x00010101	0x00000000	0x00000000	0x00000000
PSR8	0x00030303	0x00000000	0x00000000	0x00000000
PSR9	0x00030303	0x00000000	0x00000000	0x00000000
PSR10	0x00000000	0x00000000	0x00000000	0x00000000
PSR11	0x00010101	0x00000000	0x00000000	0x00000000
PSR12	0x00000000	0x00000000	0x00000000	0x00000000
PSR13	0x00000000	0x00000000	0x00000000	0x00000000
PSR14	0x00000000	0x00000000	0x00000000	0x00000000
PSR15	0x00000000	0x00000000	0x00000000	0x00000000

Name:	MATRIX_PSRx
Offset:	0x0200 + x*0x04 [x=0..15]
Property:	Read/Write


Bit	31	30	29	28	27	26	25	24
	DPSOA7	DPSOA6	DPSOA5	DPSOA4	DPSOA3	DPSOA2	DPSOA1	DPSOA0
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset


Bit	23	22	21	20	19	18	17	16
	WRUSERH7	WRUSERH6	WRUSERH5	WRUSERH4	WRUSERH3	WRUSERH2	WRUSERH1	WRUSERH0
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset


Bit	15	14	13	12	11	10	9	8
	RDUSERH7	RDUSERH6	RDUSERH5	RDUSERH4	RDUSERH3	RDUSERH2	RDUSERH1	RDUSERH0
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset


Bit	7	6	5	4	3	2	1	0
	LAUSERH7	LAUSERH6	LAUSERH5	LAUSERH4	LAUSERH3	LAUSERH2	LAUSERH1	LAUSERH0
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset

Bits 24, 25, 26, 27, 28, 29, 30, 31 – DPSOAx Downward Protection Split Address for HSELx Protected Region

Value	Description
0	For the HSELx client-protected region, the protected area split MATRIX_PASSR / PASPLITx defines the size of the client-protected area starting from the base address of the client protected region and up.
1	For the HSELx client-protected region, the protected area split MATRIX_PASSR / PASPLITx defines the size of the client-protected area starting from the end address of the client-protected region and down.

Bits 16, 17, 18, 19, 20, 21, 22, 23 – WRUSERHx Write USER for HSELx Protected Region

Privilege-eligible Area access rights:


WRUSERHx / RDUSERHx	User Access	Privileged Access
00	Denied	Write - Read
01	Read	Write - Read
10	Write	Write - Read
11	Write - Read	Write - Read

Value	Description
0	The HSELx client-protected region is split into one Write Privileged and one Write User area, according to LAUSERHx and MATRIX_PASSR / PASPLITx. That is, the so defined privilege-eligible high or low area is Privileged for Write access.
1	The HSELx client-protected region is User for Write access.

Bits 8, 9, 10, 11, 12, 13, 14, 15 – RDUSERHx Read USER for HSELx Protected Region

Value	Description
0	The HSELx client-protected region is split into one Read Privileged and one Read User area, according to LAUSERHx and MATRIX_PASSR / PASPLITx. That is, the so defined privilege-eligible high or low area is Privileged for Read access.
1	The HSELx client-protected region is User for Read access.

Bits 0, 1, 2, 3, 4, 5, 6, 7 – LAUSERHx Low Area USER in HSELx Protected Region

Value	Description
0	The protection of the HSELx client area laying below the corresponding MATRIX_PASSR / PASPLITx boundary is configured according to RDUSERHx and WRUSERHx. The whole remaining HSELx upper address space is configured as User access.
1	The HSELx client address area laying below the corresponding MATRIX_PASSR / PASPLITx boundary is configured as User access, and the whole remaining upper address space according to RDUSERHx and WRUSERHx.

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