29.9.4 TUxyPS

Prescaler Value Register

Note:

This register needs to only be written when ON = 0.
This register is not available when the module is chained and operated as a Secondary module.
The internal prescaler counter (not the TUxyPS register) is reset by any Stop or Reset event, and upon any write to the TUxyPS and TUxyTMR registers. This allows the next timer interval to be full-length.

Name:

TUxyPS


Bit	7	6	5	4	3	2	1	0
	PS[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 7:0 – PS[7:0] Clock Prescaler Register

Reset States:

POR/BOR = 00000000

All Other Resets = uuuuuuuu

Value	Description
0xFF to 0x01	Divider ratio is (PS+1):1
0x00	The input clock is not divided (1:1 clocking)

This register needs to only be written when ON = 0. This register is not available when the module is chained and operated as a Secondary module. The internal prescaler counter (not the TUxyPS register) is reset by any Stop or Reset event, and upon any write to the TUxyPS and TUxyTMR registers. This allows the next timer interval to be full-length.