15.8.10 APBD Mask
| Name: | APBDMASK |
| Offset: | 0x20 |
| Reset: | 0x00000000 |
| Property: | PAC Write-Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| PCC | I2S | DAC | ADC1 | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ADC0 | TC7 | TC6 | TCC4 | SERCOM7 | SERCOM6 | SERCOM5 | SERCOM4 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 11 – PCC PCC APBD Mask Clock Enable
| Value | Description |
|---|---|
| 0 | The APBD clock for the PCC is stopped. |
| 1 | The APBD clock for the PCC is enabled. |
Bit 10 – I2S I2S APBD Mask Clock Enable
| Value | Description |
|---|---|
| 0 | The APBD clock for the I2S is stopped. |
| 1 | The APBD clock for the I2S is enabled. |
Bit 9 – DAC DAC APBD Mask Clock Enable
| Value | Description |
|---|---|
| 0 | The APBD clock for the DAC is stopped. |
| 1 | The APBD clock for the DAC is enabled. |
Bits 7, 8 – ADCn ADCn APBD Mask Clock Enable
| Value | Description |
|---|---|
| 0 | The APBD clock for the ADCn is stopped. |
| 1 | The APBD clock for the ADCn is enabled. |
Bits 5, 6 – TCn TCn APBD Mask Clock Enable
| Value | Description |
|---|---|
| 0 | The APBD clock for the TCn is stopped. |
| 1 | The APBD clock for the TCn is enabled. |
Bit 4 – TCC4 TCC4 APBD Mask Clock Enable
| Value | Description |
|---|---|
| 0 | The APBD clock for the TCC4 is stopped. |
| 1 | The APBD clock for the TCC4 is enabled. |
Bits 0, 1, 2, 3 – SERCOM SERCOMn APBD Mask Clock Enable
| Value | Description |
|---|---|
| 0 | The APBD clock for the SERCOMn is stopped. |
| 1 | The APBD clock for the SERCOMn is enabled. |