15.8.4 High-Speed Clock Division
| Name: | HSDIV |
| Offset: | 0x04 |
| Reset: | 0x01 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| DIV[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | |
Bits 7:0 – DIV[7:0] HS Clock Division Factor
These bits define the division ratio of the main clock prescaler related to the HS clock domain (HSDIV).
| Value | Name | Description |
|---|---|---|
| 0x01 | DIV1 | Divide by 1 |
| others | - | Reserved |
