Start reception by setting the SREN bit, or for continuous
reception set the CREN bit.
The RCxIF Interrupt Flag bit will be set when reception of a
character is complete. An interrupt will be generated if the RCxIE enable bit was
set.
Read the RCxSTA register to get the ninth bit (if enabled) and determine
if any error occurred during reception.
Read the 8-bit received data by reading the RCxREG
register.
If an overrun error occurs, clear the error by either clearing
the CREN bit or by clearing the SPEN bit which resets the EUSART.
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